Chris Lattner 736a6ea3a2 Change the scheduler from adding nodes in allnodes order ... to adding them in a determinstic order (bottom up from the root) based on the structure of the graph itself. This updates tests for some random changes, interesting bits: CodeGen/Blackfin/promote-logic.ll no longer crashes. I have no idea why, but that's good right? CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but now compiles to have one fewer constant pool entry, making the expected load that was being folded disappear. Since it is an unreduced mass of gnast, I just removed it. This fixes PR6370 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97023 91177308-0d34-0410-b5e6-96231b3b80d8		2010-02-24 06:11:37 +00:00
..
Alpha
ARM	Use NEON vmin/vmax instructions for floating-point selects.	2010-02-18 06:05:53 +00:00
Blackfin	Change the scheduler from adding nodes in allnodes order	2010-02-24 06:11:37 +00:00
CBackend
CellSPU
CPP
Generic	Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there	2010-02-15 22:35:59 +00:00
MBlaze	Adding the MicroBlaze backend.	2010-02-23 19:15:24 +00:00
Mips
MSP430	Change the scheduler from adding nodes in allnodes order	2010-02-24 06:11:37 +00:00
PIC16
PowerPC	Change the scheduler from adding nodes in allnodes order	2010-02-24 06:11:37 +00:00
SPARC
SystemZ
Thumb
Thumb2	LowerCall() should always do getCopyFromReg() to reference the stack pointer.	2010-02-24 01:43:03 +00:00
X86	Change the scheduler from adding nodes in allnodes order	2010-02-24 06:11:37 +00:00
XCore	Lower BR_JT on the XCore to a jump into a series of jump instructions.	2010-02-23 13:25:07 +00:00