llvm-6502/test
James Molloy 737c2ac4fc [ARM64-BE] Implement the crazy bitcast handling for big endian vectors.
Because we've canonicalised on using LD1/ST1, every time we do a bitcast
between vector types we must do an equivalent lane reversal.

Consider a simple memory load followed by a bitconvert then a store.
  v0 = load v2i32
  v1 = BITCAST v2i32 v0 to v4i16
       store v4i16 v2

In big endian mode every memory access has an implicit byte swap. LDR and
STR do a 64-bit byte swap, whereas LD1/ST1 do a byte swap per lane - that
is, they treat the vector as a sequence of elements to be byte-swapped.
The two pairs of instructions are fundamentally incompatible. We've decided
to use LD1/ST1 only to simplify compiler implementation.

LD1/ST1 perform the equivalent of a sequence of LDR/STR + REV. This makes
the original code sequence:  v0 = load v2i32

  v1 = REV v2i32                  (implicit)
  v2 = BITCAST v2i32 v1 to v4i16
  v3 = REV v4i16 v2               (implicit)
       store v4i16 v3

But this is now broken - the value stored is different to the value loaded
due to lane reordering. To fix this, on every BITCAST we must perform two
other REVs:

  v0 = load v2i32
  v1 = REV v2i32                  (implicit)
  v2 = REV v2i32
  v3 = BITCAST v2i32 v2 to v4i16
  v4 = REV v4i16
  v5 = REV v4i16 v4               (implicit)
       store v4i16 v5

This means an extra two instructions, but actually in most cases the two REV
instructions can be combined into one. For example:
  (REV64_2s (REV64_4h X)) === (REV32_4h X)

There is also no 128-bit REV instruction. This must be synthesized with an
EXT instruction.

Most bitconverts require some sort of conversion. The only exceptions are:
  a) Identity conversions -  vNfX <-> vNiX
  b) Single-lane-to-scalar - v1fX <-> fX or v1iX <-> iX

Even though there are hundreds of changed lines, I have a fairly high confidence
that they are somewhat correct. The changes to add two REV instructions per
bitcast were pretty mechanical, and once I'd done that I threw the resulting
.td at a script I wrote which combined the two REVs together (and added
an EXT instruction, for f128) based on an instruction description I gave it.

This was much less prone to error than doing it all manually, plus my brain
would not just have melted but would have vapourised.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208194 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-07 11:28:53 +00:00
..
Analysis TTI: Estimate @llvm.fmuladd cost as fmul + fadd when FMA's aren't legal on the target. 2014-05-06 18:36:23 +00:00
Assembler
Bindings
Bitcode Add 'musttail' marker to call instructions 2014-04-24 20:14:34 +00:00
BugPoint Revert r206989, "Mark llvm/test/BugPoint/compile-custom.ll as XFAIL:vg_leak." It has been fixed since r207265. 2014-04-27 11:59:33 +00:00
CodeGen [ARM64-BE] Implement the crazy bitcast handling for big endian vectors. 2014-05-07 11:28:53 +00:00
DebugInfo DebugInfo: Correct the attribute type kind. 2014-05-01 18:31:21 +00:00
ExecutionEngine [ARM64] Disable regression tests for the old JIT. 2014-04-29 15:02:40 +00:00
Feature [IR] Make {extract,insert}element accept an index of any integer type. 2014-05-01 22:12:39 +00:00
FileCheck
Instrumentation [asan] Add a flag to control asm instrumentation. 2014-05-07 07:54:11 +00:00
Integer
JitListener
Linker
LTO Add an -mattr option to the gold plugin to support subtarget features in LTO 2014-04-25 21:46:51 +00:00
MC AArch64/ARM64: disable test directory if ARM64 not present 2014-05-07 10:42:06 +00:00
Object [llvm-readobj] Add support for Mips specific ELF header e_flags. 2014-05-01 11:07:19 +00:00
Other Do not make -pass-remarks additive. 2014-05-06 19:14:00 +00:00
TableGen [tablegen] Add !listconcat operator with the similar semantics as !strconcat 2014-05-07 10:13:19 +00:00
tools llvm-cov: Handle missing source files as GCOV does 2014-05-07 02:11:23 +00:00
Transforms Improve 'tail' call marking in TRE. A bootstrap of clang goes from 375k calls marked tail in the IR to 470k, however this improvement does not carry into an improvement of the call/jmp ratio on x86. The most common pattern is a tail call + br to a block with nothing but a 'ret'. 2014-05-05 23:59:03 +00:00
Unit
Verifier IR: Conservatively verify inalloca arguments 2014-04-30 17:22:00 +00:00
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg [Test] Remove substitution for clang 2014-05-05 17:17:27 +00:00
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh