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https://github.com/c64scene-ar/llvm-6502.git
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8ebd4b6422
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74172 91177308-0d34-0410-b5e6-96231b3b80d8
172 lines
5.5 KiB
C++
172 lines
5.5 KiB
C++
//===-- PIC16MemSelOpt.cpp - PIC16 banksel optimizer --------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the pass which optimizes the emitting of banksel
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// instructions before accessing data memory. This currently works within
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// a basic block only and keep tracks of the last accessed memory bank.
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// If memory access continues to be in the same bank it just makes banksel
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// immediate, which is a part of the insn accessing the data memory, from 1
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// to zero. The asm printer emits a banksel only if that immediate is 1.
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//
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// FIXME: this is not implemented yet. The banksel pass only works on local
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// basic blocks.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "pic16-codegen"
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#include "PIC16.h"
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#include "PIC16InstrInfo.h"
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#include "PIC16TargetAsmInfo.h"
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#include "PIC16TargetMachine.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/GlobalValue.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Support/Compiler.h"
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using namespace llvm;
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namespace {
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struct VISIBILITY_HIDDEN MemSelOpt : public MachineFunctionPass {
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static char ID;
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MemSelOpt() : MachineFunctionPass(&ID) {}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addPreservedID(MachineLoopInfoID);
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AU.addPreservedID(MachineDominatorsID);
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual const char *getPassName() const {
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return "PIC16 Memsel Optimizer";
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}
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bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB);
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bool processInstruction(MachineInstr *MI);
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private:
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const TargetInstrInfo *TII; // Machine instruction info.
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MachineBasicBlock *MBB; // Current basic block
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std::string CurBank;
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};
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char MemSelOpt::ID = 0;
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}
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FunctionPass *llvm::createPIC16MemSelOptimizerPass() {
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return new MemSelOpt();
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}
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/// runOnMachineFunction - Loop over all of the basic blocks, transforming FP
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/// register references into FP stack references.
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///
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bool MemSelOpt::runOnMachineFunction(MachineFunction &MF) {
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TII = MF.getTarget().getInstrInfo();
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bool Changed = false;
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for (MachineFunction::iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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Changed |= processBasicBlock(MF, *I);
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}
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return Changed;
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}
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/// processBasicBlock - Loop over all of the instructions in the basic block,
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/// transforming FP instructions into their stack form.
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///
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bool MemSelOpt::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
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bool Changed = false;
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MBB = &BB;
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// Let us assume that when entering a basic block now bank is selected.
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// Ideally we should look at the predecessors for this information.
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CurBank="";
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for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I) {
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Changed |= processInstruction(I);
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}
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return Changed;
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}
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bool MemSelOpt::processInstruction(MachineInstr *MI) {
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bool Changed = false;
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unsigned NumOperands = MI->getNumOperands();
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if (NumOperands == 0) return false;
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// If this insn is not going to access any memory, return.
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const TargetInstrDesc &TID = TII->get(MI->getOpcode());
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if (!(TID.isBranch() || TID.isCall() || TID.mayLoad() || TID.mayStore()))
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return false;
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// Scan for the memory address operand.
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// FIXME: Should we use standard interfaces like memoperands_iterator,
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// hasMemOperand() etc ?
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int MemOpPos = -1;
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for (unsigned i = 0; i < NumOperands; i++) {
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MachineOperand Op = MI->getOperand(i);
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if (Op.getType() == MachineOperand::MO_GlobalAddress ||
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Op.getType() == MachineOperand::MO_ExternalSymbol ||
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Op.getType() == MachineOperand::MO_MachineBasicBlock) {
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// We found one mem operand. Next one may be BS.
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MemOpPos = i;
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break;
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}
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}
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// If we did not find an insn accessing memory. Continue.
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if (MemOpPos == -1) return Changed;
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// Get the MemOp.
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MachineOperand &Op = MI->getOperand(MemOpPos);
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// If this is a pagesel material, handle it first.
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if (MI->getOpcode() == PIC16::CALL ||
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MI->getOpcode() == PIC16::br_uncond) {
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DebugLoc dl = MI->getDebugLoc();
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BuildMI(*MBB, MI, dl, TII->get(PIC16::pagesel)).
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addOperand(Op);
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return true;
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}
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// Get the section name(NewBank) for MemOp.
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// This assumes that the section names for globals are laready set by
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// AsmPrinter->doInitialization.
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std::string NewBank = CurBank;
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if (Op.getType() == MachineOperand::MO_GlobalAddress &&
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Op.getGlobal()->getType()->getAddressSpace() == PIC16ISD::RAM_SPACE) {
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NewBank = Op.getGlobal()->getSection();
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} else if (Op.getType() == MachineOperand::MO_ExternalSymbol) {
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// External Symbol is generated for temp data and arguments. They are
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// in fpdata.<functionname>.# section.
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std::string Sym = Op.getSymbolName();
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NewBank = PAN::getSectionNameForSym(Sym);
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}
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// If the previous and new section names are same, we don't need to
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// emit banksel.
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if (NewBank.compare(CurBank) != 0 ) {
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DebugLoc dl = MI->getDebugLoc();
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BuildMI(*MBB, MI, dl, TII->get(PIC16::banksel)).
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addOperand(Op);
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Changed = true;
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CurBank = NewBank;
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}
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return Changed;
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}
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