llvm-6502/test/CodeGen
Benjamin Kramer 7466678003 Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize legalized code for large integer arithmetic.
1. Inform users of ADDEs with two 0 operands that it never sets carry
2. Fold other ADDs or ADDCs into the ADDE if possible

It would be neat if we could do the same thing for SETCC+ADD eventually, but we can't do that in target independent code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126557 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-26 22:48:07 +00:00
..
Alpha
ARM Add patterns to use post-increment addressing for Neon VST1-lane instructions. 2011-02-25 06:42:42 +00:00
Blackfin
CBackend
CellSPU fix visitShift to properly zero extend the shift amount if the provided operand 2011-02-13 09:02:52 +00:00
CPP
Generic A fix for 9165. 2011-02-12 14:40:33 +00:00
MBlaze fix visitShift to properly zero extend the shift amount if the provided operand 2011-02-13 09:02:52 +00:00
Mips
MSP430 Enhance ComputeMaskedBits to know that aligned frameindexes 2011-02-13 22:25:43 +00:00
PowerPC
PTX
SPARC Generate correct Sparc32 ABI compliant code for functions that return a struct. 2011-02-21 03:42:44 +00:00
SystemZ
Thumb
Thumb2
X86 Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize legalized code for large integer arithmetic. 2011-02-26 22:48:07 +00:00
XCore Add XCore intrinsic for eeu instruction. 2011-02-24 13:39:18 +00:00