llvm-6502/test/CodeGen
Matt Arsenault 746734df1a R600/SI: Try to use scalar BFE.
Use scalar BFE with constant shift and offset when possible.
This is complicated by the fact that the scalar version packs
the two operands of the vector version into one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206558 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-18 05:19:26 +00:00
..
AArch64 This commit enables unaligned memory accesses of vector types on AArch64 back end. This should boost vectorized code performance. 2014-04-18 03:58:38 +00:00
ARM
ARM64 Make test/CodeGen/ARM64/vector-insertion.ll explicitly select neon syntax 2014-04-17 21:32:41 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC
R600 R600/SI: Try to use scalar BFE. 2014-04-18 05:19:26 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86
XCore Revert "blockfreq: Rewrite BlockFrequencyInfoImpl" 2014-04-18 02:17:43 +00:00