Andrea Di Biagio 749e8fee34 [X86] Improve the lowering of packed shifts by constant build_vector. ... This patch teaches the backend how to efficiently lower logical and arithmetic packed shifts on both SSE and AVX/AVX2 machines. When possible, instead of scalarizing a vector shift, the backend should try to expand the shift into a sequence of two packed shifts by immedate count followed by a MOVSS/MOVSD. Example (v4i32 (srl A, (build_vector < X, Y, Y, Y>))) Can be rewritten as: (v4i32 (MOVSS (srl A, <Y,Y,Y,Y>), (srl A, <X,X,X,X>))) [with X and Y ConstantInt] The advantage is that the two new shifts from the example would be lowered into X86ISD::VSRLI nodes. This is always cheaper than scalarizing the vector into four scalar shifts plus four pairs of vector insert/extract. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206316 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-15 19:30:48 +00:00
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Analysis	Fix a bug in which BranchProbabilityInfo wasn't setting branch weights of basic blocks inside loops correctly.	2014-04-14 16:56:19 +00:00
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CodeGen	[X86] Improve the lowering of packed shifts by constant build_vector.	2014-04-15 19:30:48 +00:00
DebugInfo	Change argument order and add explanatory comment to r206130	2014-04-14 22:23:06 +00:00
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MC	AArch64/ARM64: only mangle MOVZ/MOVN during encoding when needed	2014-04-15 14:00:15 +00:00
Object	[yaml2obj][ELF] ELF Relocations Support.	2014-04-11 04:13:39 +00:00
Other	Add -pass-remarks flag to 'opt'.	2014-04-08 16:42:38 +00:00
TableGen
tools	tools: fix heap-buffer-overrun detected via ASAN	2014-04-14 16:38:25 +00:00
Transforms	Add lifetime markers for allocas created to hold byval arguments, make them	2014-04-15 18:06:46 +00:00
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