mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
2ff4e9d5af
Without fastcc support, the caller just falls through to CallingConv::C for fastcc, but callee still uses fastcc, this inconsistency of calling convention is a problem, and fastcc support can fix it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162013 91177308-0d34-0410-b5e6-96231b3b80d8
290 lines
7.1 KiB
LLVM
290 lines
7.1 KiB
LLVM
; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=THUMB-LONG
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; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP
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; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=THUMB-NOVFP
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define i32 @t0(i1 zeroext %a) nounwind {
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%1 = zext i1 %a to i32
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ret i32 %1
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}
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define i32 @t1(i8 signext %a) nounwind {
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%1 = sext i8 %a to i32
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ret i32 %1
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}
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define i32 @t2(i8 zeroext %a) nounwind {
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%1 = zext i8 %a to i32
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ret i32 %1
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}
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define i32 @t3(i16 signext %a) nounwind {
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%1 = sext i16 %a to i32
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ret i32 %1
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}
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define i32 @t4(i16 zeroext %a) nounwind {
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%1 = zext i16 %a to i32
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ret i32 %1
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}
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define void @foo(i8 %a, i16 %b) nounwind {
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; ARM: foo
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; THUMB: foo
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;; Materialize i1 1
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; ARM: movw r2, #1
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;; zero-ext
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; ARM: and r2, r2, #1
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; THUMB: and r2, r2, #1
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%1 = call i32 @t0(i1 zeroext 1)
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; ARM: sxtb r2, r1
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; ARM: mov r0, r2
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; THUMB: sxtb r2, r1
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; THUMB: mov r0, r2
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%2 = call i32 @t1(i8 signext %a)
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; ARM: uxtb r2, r1
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; ARM: mov r0, r2
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; THUMB: uxtb r2, r1
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; THUMB: mov r0, r2
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%3 = call i32 @t2(i8 zeroext %a)
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; ARM: sxth r2, r1
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; ARM: mov r0, r2
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; THUMB: sxth r2, r1
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; THUMB: mov r0, r2
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%4 = call i32 @t3(i16 signext %b)
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; ARM: uxth r2, r1
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; ARM: mov r0, r2
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; THUMB: uxth r2, r1
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; THUMB: mov r0, r2
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%5 = call i32 @t4(i16 zeroext %b)
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;; A few test to check materialization
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;; Note: i1 1 was materialized with t1 call
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; ARM: movw r1, #255
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%6 = call i32 @t2(i8 zeroext 255)
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; ARM: movw r1, #65535
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; THUMB: movw r1, #65535
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%7 = call i32 @t4(i16 zeroext 65535)
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ret void
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}
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define void @foo2() nounwind {
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%1 = call signext i16 @t5()
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%2 = call zeroext i16 @t6()
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%3 = call signext i8 @t7()
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%4 = call zeroext i8 @t8()
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%5 = call zeroext i1 @t9()
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ret void
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}
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declare signext i16 @t5();
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declare zeroext i16 @t6();
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declare signext i8 @t7();
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declare zeroext i8 @t8();
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declare zeroext i1 @t9();
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define i32 @t10(i32 %argc, i8** nocapture %argv) {
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entry:
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; ARM: @t10
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; ARM: movw r0, #0
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; ARM: movw r1, #248
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; ARM: movw r2, #187
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; ARM: movw r3, #28
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; ARM: movw r9, #40
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; ARM: movw r12, #186
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; ARM: uxtb r0, r0
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; ARM: uxtb r1, r1
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; ARM: uxtb r2, r2
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; ARM: uxtb r3, r3
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; ARM: uxtb r9, r9
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; ARM: str r9, [sp]
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; ARM: uxtb r9, r12
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; ARM: str r9, [sp, #4]
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; ARM: bl _bar
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; ARM-LONG: @t10
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; ARM-LONG: movw lr, :lower16:L_bar$non_lazy_ptr
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; ARM-LONG: movt lr, :upper16:L_bar$non_lazy_ptr
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; ARM-LONG: ldr lr, [lr]
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; ARM-LONG: blx lr
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; THUMB: @t10
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; THUMB: movs r0, #0
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; THUMB: movt r0, #0
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; THUMB: movs r1, #248
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; THUMB: movt r1, #0
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; THUMB: movs r2, #187
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; THUMB: movt r2, #0
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; THUMB: movs r3, #28
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; THUMB: movt r3, #0
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; THUMB: movw r9, #40
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; THUMB: movt r9, #0
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; THUMB: movw r12, #186
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; THUMB: movt r12, #0
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; THUMB: uxtb r0, r0
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; THUMB: uxtb r1, r1
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; THUMB: uxtb r2, r2
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; THUMB: uxtb r3, r3
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; THUMB: uxtb.w r9, r9
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; THUMB: str.w r9, [sp]
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; THUMB: uxtb.w r9, r12
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; THUMB: str.w r9, [sp, #4]
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; THUMB: bl _bar
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; THUMB-LONG: @t10
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; THUMB-LONG: movw lr, :lower16:L_bar$non_lazy_ptr
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; THUMB-LONG: movt lr, :upper16:L_bar$non_lazy_ptr
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; THUMB-LONG: ldr.w lr, [lr]
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; THUMB-LONG: blx lr
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%call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70)
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ret i32 0
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}
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declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext)
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define i32 @bar0(i32 %i) nounwind {
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ret i32 0
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}
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define void @foo3() uwtable {
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; ARM: movw r0, #0
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; ARM: movw r1, :lower16:_bar0
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; ARM: movt r1, :upper16:_bar0
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; ARM: blx r1
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; THUMB: movs r0, #0
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; THUMB: movw r1, :lower16:_bar0
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; THUMB: movt r1, :upper16:_bar0
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; THUMB: blx r1
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%fptr = alloca i32 (i32)*, align 8
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store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8
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%1 = load i32 (i32)** %fptr, align 8
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%call = call i32 %1(i32 0)
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ret void
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}
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define i32 @LibCall(i32 %a, i32 %b) {
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entry:
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; ARM: LibCall
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; ARM: bl ___udivsi3
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; ARM-LONG: LibCall
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; ARM-LONG: movw r2, :lower16:L___udivsi3$non_lazy_ptr
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; ARM-LONG: movt r2, :upper16:L___udivsi3$non_lazy_ptr
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; ARM-LONG: ldr r2, [r2]
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; ARM-LONG: blx r2
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; THUMB: LibCall
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; THUMB: bl ___udivsi3
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; THUMB-LONG: LibCall
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; THUMB-LONG: movw r2, :lower16:L___udivsi3$non_lazy_ptr
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; THUMB-LONG: movt r2, :upper16:L___udivsi3$non_lazy_ptr
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; THUMB-LONG: ldr r2, [r2]
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; THUMB-LONG: blx r2
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%tmp1 = udiv i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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define i32 @VarArg() nounwind {
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entry:
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%i = alloca i32, align 4
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%j = alloca i32, align 4
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%k = alloca i32, align 4
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%m = alloca i32, align 4
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%n = alloca i32, align 4
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%tmp = alloca i32, align 4
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%0 = load i32* %i, align 4
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%1 = load i32* %j, align 4
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%2 = load i32* %k, align 4
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%3 = load i32* %m, align 4
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%4 = load i32* %n, align 4
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; ARM: VarArg
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; ARM: mov r7, sp
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; ARM: movw r0, #5
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; ARM: ldr r1, [r7, #-4]
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; ARM: ldr r2, [r7, #-8]
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; ARM: ldr r3, [r7, #-12]
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; ARM: ldr r9, [sp, #16]
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; ARM: ldr r12, [sp, #12]
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; ARM: str r9, [sp]
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; ARM: str r12, [sp, #4]
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; ARM: bl _CallVariadic
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; THUMB: mov r7, sp
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; THUMB: movs r0, #5
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; THUMB: movt r0, #0
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; THUMB: ldr r1, [sp, #28]
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; THUMB: ldr r2, [sp, #24]
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; THUMB: ldr r3, [sp, #20]
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; THUMB: ldr.w r9, [sp, #16]
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; THUMB: ldr.w r12, [sp, #12]
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; THUMB: str.w r9, [sp]
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; THUMB: str.w r12, [sp, #4]
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; THUMB: bl _CallVariadic
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%call = call i32 (i32, ...)* @CallVariadic(i32 5, i32 %0, i32 %1, i32 %2, i32 %3, i32 %4)
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store i32 %call, i32* %tmp, align 4
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%5 = load i32* %tmp, align 4
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ret i32 %5
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}
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declare i32 @CallVariadic(i32, ...)
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; Test fastcc
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define fastcc void @fast_callee(float %i) ssp {
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entry:
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; ARM: fast_callee
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; ARM: vmov r0, s0
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; THUMB: fast_callee
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; THUMB: vmov r0, s0
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; ARM-NOVFP: fast_callee
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; ARM-NOVFP-NOT: s0
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; THUMB-NOVFP: fast_callee
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; THUMB-NOVFP-NOT: s0
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call void @print(float %i)
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ret void
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}
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define void @fast_caller() ssp {
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entry:
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; ARM: fast_caller
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; ARM: vldr s0,
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; THUMB: fast_caller
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; THUMB: vldr s0,
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; ARM-NOVFP: fast_caller
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; ARM-NOVFP: movw r0, #13107
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; ARM-NOVFP: movt r0, #16611
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; THUMB-NOVFP: fast_caller
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; THUMB-NOVFP: movw r0, #13107
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; THUMB-NOVFP: movt r0, #16611
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call fastcc void @fast_callee(float 0x401C666660000000)
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ret void
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}
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define void @no_fast_callee(float %i) ssp {
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entry:
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; ARM: no_fast_callee
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; ARM: vmov s0, r0
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; THUMB: no_fast_callee
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; THUMB: vmov s0, r0
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; ARM-NOVFP: no_fast_callee
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; ARM-NOVFP-NOT: s0
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; THUMB-NOVFP: no_fast_callee
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; THUMB-NOVFP-NOT: s0
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call void @print(float %i)
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ret void
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}
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define void @no_fast_caller() ssp {
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entry:
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; ARM: no_fast_caller
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; ARM: vmov r0, s0
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; THUMB: no_fast_caller
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; THUMB: vmov r0, s0
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; ARM-NOVFP: no_fast_caller
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; ARM-NOVFP: movw r0, #13107
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; ARM-NOVFP: movt r0, #16611
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; THUMB-NOVFP: no_fast_caller
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; THUMB-NOVFP: movw r0, #13107
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; THUMB-NOVFP: movt r0, #16611
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call void @no_fast_callee(float 0x401C666660000000)
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ret void
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}
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declare void @print(float)
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