Matthias Braun 74c23af006 ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor out common code ... This commit factors out common code from MergeBaseUpdateLoadStore() and MergeBaseUpdateLSMultiple() and introduces a new function MergeBaseUpdateLSDouble() which merges adds/subs preceding/following a strd/ldrd instruction into an strd/ldrd instruction with writeback where possible. Differential Revision: http://reviews.llvm.org/D10676 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241928 91177308-0d34-0410-b5e6-96231b3b80d8		2015-07-10 18:37:33 +00:00
..
AArch64	ComputeKnownBits: be a bit smarter about ADDs	2015-07-10 18:29:02 +00:00
AMDGPU	AMDGPU/SI: Add debugging subtarget feature for DS offsets	2015-07-06 16:01:58 +00:00
ARM	ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor out common code	2015-07-10 18:37:33 +00:00
BPF
CPP
Generic	llc: Add a 'run-pass' option.	2015-07-06 17:44:26 +00:00
Hexagon	[Hexagon] Add support for atomic RMW operations	2015-07-09 14:51:21 +00:00
Inputs
Mips
MIR	MIR Serialization: Initial serialization of stack objects.	2015-07-10 18:13:57 +00:00
MSP430
NVPTX	Actually support volatile memcpys in NVPTX lowering	2015-07-10 15:40:33 +00:00
PowerPC
SPARC	[SPARC] Cleanup handling of the Y/ASR registers.	2015-07-08 16:25:12 +00:00
SystemZ
Thumb
Thumb2	ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2	2015-07-10 18:28:49 +00:00
WebAssembly	[WebAssembly] Create a CodeGen unittest directory.	2015-07-06 23:14:57 +00:00
WinEH	[WinEH] Make sure LSDA tables are 4 byte aligned	2015-07-10 00:08:49 +00:00
X86	ComputeKnownBits: be a bit smarter about ADDs	2015-07-10 18:29:02 +00:00
XCore