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fdb6eb65c7
Current 64-bit SVR4 code seems to have some remnants of Darwin code in AltiVec argument handing. This had the effect that AltiVec arguments (or subsequent arguments) were not correctly placed in the parameter area in some cases. The correct behaviour with the 64-bit SVR4 ABI is: - All AltiVec arguments take up space in the parameter area, just like any other arguments, whether vararg or not. - They are always 16-byte aligned, skipping a parameter area doubleword (and the associated GPR, if any), if necessary. This patch implements the correct behaviour and adds a test case. (Verified against GCC behaviour via the ABI compat test suite.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211492 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
635 B
LLVM
26 lines
635 B
LLVM
; RUN: llc < %s -march=ppc64 -mattr=+altivec | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Verify that in the 64-bit Linux ABI, vector arguments take up space
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; in the parameter save area.
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define i64 @callee(i64 %a, <4 x i32> %b, i64 %c, <4 x i32> %d, i64 %e) {
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entry:
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ret i64 %e
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}
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; CHECK-LABEL: callee:
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; CHECK: ld 3, 112(1)
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define void @caller(i64 %x, <4 x i32> %y) {
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entry:
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tail call void @test(i64 %x, <4 x i32> %y, i64 %x, <4 x i32> %y, i64 %x)
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ret void
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}
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; CHECK-LABEL: caller:
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; CHECK: std 3, 112(1)
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declare void @test(i64, <4 x i32>, i64, <4 x i32>, i64)
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