Craig Topper 75485d6746 Add X86 RORX instruction ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142741 91177308-0d34-0410-b5e6-96231b3b80d8		2011-10-23 07:34:00 +00:00
..
3DNow.s	Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil.	2011-07-27 23:22:03 +00:00
dg.exp
padlock.s	Recognize the xstorerng alias for VIA PadLock's xstore instruction.	2011-06-30 01:38:03 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s	The wrong relocation was being emitted for several SSSE3 instructions.	2011-09-20 21:39:21 +00:00
x86_64-bmi-encoding.s	Add X86 RORX instruction	2011-10-23 07:34:00 +00:00
x86_64-encoding.s	Add encoding tests for flds/filds	2011-04-15 19:25:31 +00:00
x86_64-fma3-encoding.s
x86_64-imm-widths.s	Replace a gross hack (the MOV64ri_alt instruction) with a slightly less	2010-10-05 21:09:45 +00:00
x86_directives.s
x86_errors.s	Enhance llvm::SourceMgr to support diagnostic ranges, the same way clang does. Enhance	2011-10-16 04:47:35 +00:00
x86_operands.s
x86-32-avx.s	Reorder declarations of vmovmskp* and also put the necessary AVX	2011-08-15 23:36:45 +00:00
x86-32-coverage.s	Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil.	2011-07-27 23:22:03 +00:00
x86-32-fma3.s
x86-32.s	Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine.	2011-10-07 05:35:38 +00:00
x86-64.s	Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine.	2011-10-07 05:35:38 +00:00