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https://github.com/c64scene-ar/llvm-6502.git
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101771ba4d
within the codegen EK_GPRel64BlockAddress. This was not supported for direct object output and resulted in an assertion. This change adds support for EK_GPRel64BlockAddress for direct object. One fallout from this is to turn on rela relocations for mips64 to match gas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162334 91177308-0d34-0410-b5e6-96231b3b80d8
40 lines
1.2 KiB
LLVM
40 lines
1.2 KiB
LLVM
; This test case will cause an internal EK_GPRel64BlockAddress to be
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; produced. This was not handled for direct object and an assertion
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; to occur. This is a variation on test case test/CodeGen/Mips/do_switch.ll
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; RUN: llc < %s -filetype=obj -march=mips -relocation-model=static
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; RUN: llc < %s -filetype=obj -march=mips -relocation-model=pic
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; RUN: llc < %s -filetype=obj -march=mips64 -relocation-model=pic -mcpu=mips64 -mattr=n64
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define i32 @main() nounwind readnone {
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entry:
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%x = alloca i32, align 4 ; <i32*> [#uses=2]
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store volatile i32 2, i32* %x, align 4
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%0 = load volatile i32* %x, align 4 ; <i32> [#uses=1]
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switch i32 %0, label %bb4 [
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i32 0, label %bb5
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i32 1, label %bb1
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i32 2, label %bb2
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i32 3, label %bb3
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]
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bb1: ; preds = %entry
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ret i32 2
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bb2: ; preds = %entry
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ret i32 0
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bb3: ; preds = %entry
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ret i32 3
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bb4: ; preds = %entry
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ret i32 4
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bb5: ; preds = %entry
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ret i32 1
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}
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