Evan Cheng 48af260bb1 Forgot this test earlier. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83143 91177308-0d34-0410-b5e6-96231b3b80d8		2009-09-30 08:41:27 +00:00
..
Alpha
ARM	Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.	2009-09-30 00:10:16 +00:00
Blackfin	Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of	2009-09-28 05:28:43 +00:00
CBackend
CellSPU	Convert more tests to avoid llvm-as.	2009-09-11 18:36:27 +00:00
CPP
Generic
Mips
MSP430	Allow symbols to start from the digit if target requests it. This allows, e.g. pinning	2009-09-18 16:57:42 +00:00
PIC16
PowerPC	Add nounwind to this test.	2009-09-24 20:20:08 +00:00
SPARC	several major improvements to the sparc backend: support for weak linkage	2009-09-15 17:46:24 +00:00
SystemZ
Thumb
Thumb2	Forgot this test earlier.	2009-09-30 08:41:27 +00:00
X86	Remove regression that requires post-RA scheduling from a target that does not use that scheduler.	2009-09-30 00:23:57 +00:00
XCore