Jakob Stoklund Olesen 369a4c7759 Eliminate a batch of uses of sub_ss and sub_sd in the X86 target. ... These idempotent sub-register indices don't do anything --- They simply map XMM registers to themselves. They no longer affect register classes either since the SubRegClasses field has been removed from Target.td. This patch replaces XMM->XMM EXTRACT_SUBREG and INSERT_SUBREG patterns with COPY_TO_REGCLASS patterns which simply become COPY instructions. The number of IMPLICIT_DEF instructions before register allocation is reduced, and that is the cause of the test case changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160816 91177308-0d34-0410-b5e6-96231b3b80d8		2012-07-26 21:40:42 +00:00
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ARM	[arm-fast-isel] Add support for vararg function calls.	2012-07-19 09:49:00 +00:00
CellSPU	Implement r160312 as target indepedenet dag combine.	2012-07-17 08:31:11 +00:00
CPP	test commit	2012-07-18 17:53:05 +00:00
Generic	Fix a bug in the scalarization of BUILD_VECTOR. BUILD_VECTOR elements may be wider than the output element type. Make sure to trunc them if needed.	2012-07-15 20:39:08 +00:00
Hexagon
MBlaze
Mips	Fix call setup for PIC.	2012-07-26 02:24:43 +00:00
MSP430
NVPTX
PowerPC
SPARC
Thumb
Thumb2	[arm-fast-isel] Add support for vararg function calls.	2012-07-19 09:49:00 +00:00
X86	Eliminate a batch of uses of sub_ss and sub_sd in the X86 target.	2012-07-26 21:40:42 +00:00
XCore