Hao Liu 75ad488c41 [AArch64]Select wide immediate offset into [Base+XReg] addressing mode ... e.g Currently we'll generate following instructions if the immediate is too wide: MOV X0, WideImmediate ADD X1, BaseReg, X0 LDR X2, [X1, 0] Using [Base+XReg] addressing mode can save one ADD as following: MOV X0, WideImmediate LDR X2, [BaseReg, X0] Differential Revision: http://reviews.llvm.org/D5477 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219665 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-14 06:50:36 +00:00
..
Analysis	[modules] Stop excluding Support/Debug.h from the Support module. This header	2014-10-13 00:41:03 +00:00
AsmParser
Bitcode	Introduce LLVMWriteBitcodeToMemoryBuffer C API function.	2014-10-14 00:30:59 +00:00
CodeGen	Remove the use and member variable of the TargetMachine from	2014-10-14 06:26:57 +00:00
DebugInfo	Add couple of missing 'override' keyword. NFC.	2014-10-10 17:34:30 +00:00
ExecutionEngine	[MCJIT] Replace memcpy with readBytesUnaligned in RuntimeDyldMachOI386.	2014-10-10 23:07:09 +00:00
IR	Return undef on FP <-> Int conversions that overflow (PR21330).	2014-10-10 23:00:21 +00:00
IRReader
LineEditor
Linker
LTO
MC	MC: Shrink MCSymbolRefExpr by only storing the bits we need.	2014-10-11 17:57:27 +00:00
Object	Object, COFF: Move the VirtualSize/SizeOfRawData logic to getSectionSize	2014-10-09 08:42:31 +00:00
Option
ProfileData	Reduce double set lookups. NFC.	2014-10-10 15:32:50 +00:00
Support	Removing the static destructor from ManagedStatic.cpp by controlling the allocation and de-allocation of the mutex.	2014-10-13 22:37:25 +00:00
TableGen
Target	[AArch64]Select wide immediate offset into [Base+XReg] addressing mode	2014-10-14 06:50:36 +00:00
Transforms	Switch to select optimization for two-case switches	2014-10-14 01:58:26 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile