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7610ba7d24
llvm-6502/lib/Target/R600
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David Blaikie 7610ba7d24 Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter 
This covers essentially all of llvm's headers and libs. One or two weird
cases I wasn't sure were worth/appropriate to fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232394 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 18:06:57 +00:00
..
AsmParser Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter 2015-03-16 18:06:57 +00:00
InstPrinter R600/SI: Remove _e32 and _e64 suffixes from mnemonics 2015-03-12 21:34:22 +00:00
MCTargetDesc Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter 2015-03-16 18:06:57 +00:00
TargetInfo
AMDGPU.h
AMDGPU.td R600/SI: Limit SGPRs to 80 on Tonga and Iceland 2015-03-09 15:48:09 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPUAsmPrinter.cpp R600/SI: Limit SGPRs to 80 on Tonga and Iceland 2015-03-09 15:48:09 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
AMDGPUInstrInfo.h ArrayRefize memory operand folding. NFC. 2015-02-28 12:04:00 +00:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td R600/SI: Add an intrinsic for S_FLBIT_I32 / V_FFBH_I32 2015-03-04 17:33:45 +00:00
AMDGPUISelDAGToDAG.cpp R600/SI: Add slc, glc, and tfe to non-atomic _ADDR64 instructions 2015-02-27 14:59:41 +00:00
AMDGPUISelLowering.cpp
AMDGPUISelLowering.h
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPUPromoteAlloca.cpp Make DataLayout Non-Optional in the Module 2015-03-04 18:43:29 +00:00
AMDGPURegisterInfo.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
AMDGPURegisterInfo.h Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp R600/SI: Limit SGPRs to 80 on Tonga and Iceland 2015-03-09 15:48:09 +00:00
AMDGPUSubtarget.h R600/SI: Limit SGPRs to 80 on Tonga and Iceland 2015-03-09 15:48:09 +00:00
AMDGPUTargetMachine.cpp Move the DataLayout to the generic TargetMachine, making it mandatory. 2015-03-12 00:07:24 +00:00
AMDGPUTargetMachine.h Move the DataLayout to the generic TargetMachine, making it mandatory. 2015-03-12 00:07:24 +00:00
AMDGPUTargetTransformInfo.cpp DataLayout is mandatory, update the API to reflect it with references. 2015-03-10 02:37:25 +00:00
AMDGPUTargetTransformInfo.h
AMDILCFGStructurizer.cpp r600: Clear visited structure before running. 2015-03-13 17:32:46 +00:00
AMDKernelCodeT.h
CaymanInstructions.td
CIInstructions.td
CMakeLists.txt
EvergreenInstructions.td
LLVMBuild.txt
Makefile
Processors.td R600/SI: Limit SGPRs to 80 on Tonga and Iceland 2015-03-09 15:48:09 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
R600InstrInfo.h
R600Instructions.td
R600Intrinsics.td
R600ISelLowering.cpp DataLayout is mandatory, update the API to reflect it with references. 2015-03-10 02:37:25 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600RegisterInfo.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
R600RegisterInfo.h Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h
SIFixSGPRCopies.cpp
SIFixSGPRLiveRanges.cpp
SIFoldOperands.cpp
SIInsertWaits.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
SIInstrFormats.td R600/SI: Remove _e32 and _e64 suffixes from mnemonics 2015-03-12 21:34:22 +00:00
SIInstrInfo.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
SIInstrInfo.h Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
SIInstrInfo.td R600/SI: Don't print scc reg in sopc assembly string 2015-03-12 21:34:28 +00:00
SIInstructions.td R600/SI: Remove _e32 and _e64 suffixes from mnemonics 2015-03-12 21:34:22 +00:00
SIIntrinsics.td
SIISelLowering.cpp R600/SI: don't try min3/max3/med3 with f64 2015-03-16 15:53:55 +00:00
SIISelLowering.h R600/SI: Remove isel mubuf legalization 2015-02-24 17:59:19 +00:00
SILoadStoreOptimizer.cpp R600/SI: Move gds operand to the end of operand list 2015-03-09 18:49:54 +00:00
SILowerControlFlow.cpp
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIPrepareScratchRegs.cpp
SIRegisterInfo.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
SIRegisterInfo.h Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
SIRegisterInfo.td R600/SI: Remove unused register class 2015-03-06 17:00:16 +00:00
SISchedule.td
SIShrinkInstructions.cpp R600/SI: Add 32-bit encoding of v_cndmask_b32 2015-03-10 16:16:44 +00:00
SITypeRewriter.cpp
VIInstrFormats.td
VIInstructions.td