Owen Anderson 765fd9c62d CombinerAA is now reordering these stores. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114354 91177308-0d34-0410-b5e6-96231b3b80d8		2010-09-20 20:56:29 +00:00
..
Alpha	PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually	2010-08-01 21:13:28 +00:00
ARM	Simplify ARM callee-saved register handling by removing the distinction	2010-09-20 19:32:20 +00:00
Blackfin	Remove TargetInstrInfo::copyRegToReg entirely.	2010-07-11 17:01:17 +00:00
CBackend
CellSPU	Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction.	2010-09-16 12:29:33 +00:00
CPP
Generic	Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself	2010-07-27 18:02:18 +00:00
MBlaze	Split big test into multiple directories to cater to	2010-04-07 20:43:35 +00:00
Mips	Correct bogus module triple specifications.	2010-08-30 10:48:29 +00:00
MSP430	CombinerAA is now reordering these stores.	2010-09-20 20:56:29 +00:00
PIC16	Remove XFAIL for vg_leak as the leaks are fixed by 100601.	2010-04-07 07:06:48 +00:00
PowerPC	PR7781: Fix incorrect shifting in PPCTargetLowering::LowerBUILD_VECTOR.	2010-08-02 00:18:19 +00:00
PTX	Add the exit instruction to the PTX target.	2010-09-18 18:52:28 +00:00
SPARC	Split big test into multiple directories to cater to	2010-04-07 20:43:35 +00:00
SystemZ	Correct bogus module triple specifications.	2010-08-30 10:48:29 +00:00
Thumb	Re-enable usage of the ARM base pointer. r113394 fixed the known failures.	2010-09-08 20:12:02 +00:00
Thumb2	Simplify ARM callee-saved register handling by removing the distinction	2010-09-20 19:32:20 +00:00
X86	When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore,	2010-09-20 20:39:59 +00:00
XCore	Start function numbering at 0.	2010-04-17 16:29:15 +00:00