llvm-6502/test/CodeGen
Tim Northover eddeac0b8c ARM: set preferred aggregate alignment to 32 universally.
Before, ARM and Thumb mode code had different preferred alignments, which could
lead to some rather unexpected results. There's justification for reducing it
from the default 64-bits (wasted space), but I don't think there is for going
below 32-bits.

There's no actual ABI change here, just to reassure people.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219719 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-14 20:57:26 +00:00
..
AArch64 [FastISel][AArch64] Fix sign-/zero-extend folding when SelectionDAG is involved. 2014-10-14 20:36:02 +00:00
ARM ARM: set preferred aggregate alignment to 32 universally. 2014-10-14 20:57:26 +00:00
CPP
Generic Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Hexagon Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Inputs Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Mips [mips] Mark redundant instructions with a comment in test/CodeGen/Mips/Fast-ISel/icmpa.ll. 2014-10-13 10:18:02 +00:00
MSP430
NVPTX Revert r216862 due to a performance regression 2014-10-01 15:22:13 +00:00
PowerPC Improve sqrt estimate algorithm (fast-math) 2014-10-09 21:26:35 +00:00
R600 Reapply "R600: Add new intrinsic to read work dimensions" 2014-10-14 20:05:26 +00:00
SPARC Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
SystemZ
Thumb Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Thumb2 [ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5 2014-10-01 13:13:18 +00:00
X86 Fix a broadcast related regression on the vector shuffle lowering. 2014-10-13 16:16:16 +00:00
XCore Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00