llvm-6502/test/CodeGen
Eli Friedman 76927d7303 Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent.
The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).

rdar://9437928 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 23:49:02 +00:00
..
Alpha
ARM Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent. 2011-05-25 23:49:02 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic Move test for appropriate directory. 2011-05-17 19:06:43 +00:00
MBlaze
Mips Define WeakRefDirective. 2011-05-25 23:30:30 +00:00
MSP430
PowerPC FileCheckize and break dependence on coalescing order. 2011-05-04 19:02:01 +00:00
PTX PTX: add flag to disable mad/fma selection 2011-05-18 15:42:23 +00:00
SPARC Fix more register and coalescing dependencies. 2011-05-04 19:02:11 +00:00
SystemZ
Thumb Move this test to CodeGen/Thumb. rdar://problem/9416774 2011-05-11 19:41:28 +00:00
Thumb2 Since I can't reproduce the failures from 131261, re-trying with a 2011-05-13 00:51:54 +00:00
X86 Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent. 2011-05-25 23:49:02 +00:00
XCore