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llvm-6502/lib/Target/R600
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Tom Stellard 11580ee62d R600/SI: Use a ComplexPattern for MUBUF stores 
Now that non-leaf ComplexPatterns are allowed we can fold all the MUBUF
store patterns into the instruction definition.  We will also be able to
reuse this new ComplexPattern for MUBUF loads and atomic operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211644 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-24 23:33:07 +00:00
..
InstPrinter Fix missing words in sentence 2014-06-23 18:00:26 +00:00
MCTargetDesc Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the assert. 2014-06-19 06:10:58 +00:00
TargetInfo
AMDGPU.h R600: Use LDS and vectors for private memory 2014-06-17 16:53:14 +00:00
AMDGPU.td R600: Trivial subtarget feature cleanups. 2014-06-20 06:50:05 +00:00
AMDGPUAsmPrinter.cpp R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp Fix typo 2014-06-14 04:26:07 +00:00
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp R600: Remove AMDIL instruction and register definitions 2014-06-13 16:38:59 +00:00
AMDGPUInstrInfo.h R600: Remove AMDIL instruction and register definitions 2014-06-13 16:38:59 +00:00
AMDGPUInstrInfo.td R600: Fix inconsistency in rsq instructions. 2014-06-24 22:13:39 +00:00
AMDGPUInstructions.td R600: Fix inconsistency in rsq instructions. 2014-06-24 22:13:39 +00:00
AMDGPUIntrinsicInfo.cpp R600: Rename AMDIL file 2014-06-23 18:00:31 +00:00
AMDGPUIntrinsicInfo.h R600: Rename AMDIL file 2014-06-23 18:00:31 +00:00
AMDGPUIntrinsics.td R600: Fix inconsistency in rsq instructions. 2014-06-24 22:13:39 +00:00
AMDGPUISelDAGToDAG.cpp R600/SI: Use a ComplexPattern for MUBUF stores 2014-06-24 23:33:07 +00:00
AMDGPUISelLowering.cpp R600: Promote i64 stores to v2i32 2014-06-24 23:33:04 +00:00
AMDGPUISelLowering.h R600: Fix inconsistency in rsq instructions. 2014-06-24 22:13:39 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
AMDGPUMCInstLower.h Alphabetize forward declarations 2014-06-23 18:00:20 +00:00
AMDGPUPromoteAlloca.cpp R600: Use LDS and vectors for private memory 2014-06-17 16:53:14 +00:00
AMDGPURegisterInfo.cpp R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
AMDGPURegisterInfo.h R600: Remove AMDIL instruction and register definitions 2014-06-13 16:38:59 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp R600: Use LDS and vectors for private memory 2014-06-17 16:53:14 +00:00
AMDGPUSubtarget.h R600: Trivial subtarget feature cleanups. 2014-06-20 06:50:05 +00:00
AMDGPUTargetMachine.cpp R600: Use LDS and vectors for private memory 2014-06-17 16:53:14 +00:00
AMDGPUTargetMachine.h R600: Rename AMDIL file 2014-06-23 18:00:31 +00:00
AMDGPUTargetTransformInfo.cpp
AMDILCFGStructurizer.cpp
CaymanInstructions.td
CMakeLists.txt R600: Remove AMDILISelLowering 2014-06-23 18:00:55 +00:00
EvergreenInstructions.td R600/SI: Add a pattern for llvm.AMDGPU.barrier.global 2014-06-17 16:53:09 +00:00
LLVMBuild.txt
Makefile
Processors.td
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp R600: Use LDS and vectors for private memory 2014-06-17 16:53:14 +00:00
R600InstrInfo.h R600: Use LDS and vectors for private memory 2014-06-17 16:53:14 +00:00
R600Instructions.td R600: Fix inconsistency in rsq instructions. 2014-06-24 22:13:39 +00:00
R600Intrinsics.td
R600ISelLowering.cpp R600: Fix inconsistency in rsq instructions. 2014-06-24 22:13:39 +00:00
R600ISelLowering.h R600: Remove AMDILISelLowering 2014-06-23 18:00:55 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
R600RegisterInfo.cpp R600: Remove AMDIL instruction and register definitions 2014-06-13 16:38:59 +00:00
R600RegisterInfo.h R600: Remove AMDIL instruction and register definitions 2014-06-13 16:38:59 +00:00
R600RegisterInfo.td R600: Use LDS and vectors for private memory 2014-06-17 16:53:14 +00:00
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp R600/SI: SI Control Flow Annotation bug fixed 2014-06-20 17:06:02 +00:00
SIDefines.h
SIFixSGPRCopies.cpp
SIInsertWaits.cpp R600/SI: Add intrinsics for various math instructions. 2014-06-19 01:19:19 +00:00
SIInstrFormats.td R600/SI: Make sure target flags are set on pseudo VOP3 instructions 2014-06-17 19:34:46 +00:00
SIInstrInfo.cpp R600/SI: Verify restrictions on div_scale operands. 2014-06-23 18:28:31 +00:00
SIInstrInfo.h R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
SIInstrInfo.td R600/SI: Use a ComplexPattern for MUBUF stores 2014-06-24 23:33:07 +00:00
SIInstructions.td R600/SI: Use a ComplexPattern for MUBUF stores 2014-06-24 23:33:07 +00:00
SIIntrinsics.td R600/SI: add gather4 and getlod intrinsics (v3) 2014-06-18 22:00:29 +00:00
SIISelLowering.cpp R600: Promote i64 stores to v2i32 2014-06-24 23:33:04 +00:00
SIISelLowering.h R600/SI: Use v_cvt_f32_ubyte* instructions 2014-06-11 17:50:44 +00:00
SILowerControlFlow.cpp R600/SI: Re-initialize the m0 register after using it for indirect addressing 2014-06-17 16:53:04 +00:00
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp R600: Remove AMDIL instruction and register definitions 2014-06-13 16:38:59 +00:00
SIRegisterInfo.h R600: Remove AMDIL instruction and register definitions 2014-06-13 16:38:59 +00:00
SIRegisterInfo.td R600/SI: add gather4 and getlod intrinsics (v3) 2014-06-18 22:00:29 +00:00
SISchedule.td
SITypeRewriter.cpp