Vincent Lejeune 76fc2d077f R600: Use bottom up scheduling algorithm ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182129 91177308-0d34-0410-b5e6-96231b3b80d8

2013-05-17 16:50:56 +00:00

..

AArch64

More test coverage for addFrameMove.

2013-05-16 20:50:56 +00:00

ARM

ARM ISel: Don't create illegal types during LowerMUL

2013-05-14 22:33:24 +00:00

CPP

test commit: remove blank line.

2013-03-14 05:43:59 +00:00

Generic

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

Hexagon

Hexagon: Pass to replace tranfer/copy instructions into combine instruction

2013-05-14 18:54:06 +00:00

Inputs

Revert "Adding DIImportedModules to DIScopes."

2013-03-28 02:44:59 +00:00

MBlaze

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00

Mips

[mips] Improve instruction selection for pattern (store (fp_to_sint $src), $ptr).

2013-05-16 21:17:15 +00:00

MSP430

DAGCombiner: Simplify inverted bit tests

2013-05-08 06:44:42 +00:00

NVPTX

[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.

2013-03-30 14:29:30 +00:00

PowerPC

Fix cpu on test CodeGen/PowerPC/ctrloop-fp64.ll

2013-05-16 20:28:05 +00:00

R600

R600: Use bottom up scheduling algorithm

2013-05-17 16:50:56 +00:00

SI

Add R600 backend

2012-12-11 21:25:42 +00:00

SPARC

[Sparc] Implements hasReservedCallFrame and hasFP.

2013-05-17 15:14:34 +00:00

SystemZ

[SystemZ] Make use of SUBTRACT HALFWORD

2013-05-15 15:05:29 +00:00

Thumb

LocalStackSlotAllocation improvements

2013-04-30 20:04:37 +00:00

Thumb2

Fix ARM FastISel tests, as a first step to enabling ARM FastISel

2013-05-14 16:26:38 +00:00

X86

X86: Make shuffle -> shift conversion more aggressive about undefs.

2013-05-17 14:48:34 +00:00

XCore

[XCore] Fix handling of functions where only the LR is spilled.

2013-05-09 16:43:42 +00:00