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llvm-6502/test/Bitcode/vectorInstructions.3.2.ll.bc
Michael Kuperstein 2d0eef4c7d Ensure bitcode encoding of instructions and their operands stays stable. 
This includes instructions with aggregate operands (insert/extract), instructions with vector operands (insert/extract/shuffle), binary arithmetic and bitwise instructions, conversion instructions and terminators.

Work was done by lama.saba@intel.com.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202262 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-26 12:06:36 +00:00

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