mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-23 16:30:00 +00:00
a9a94ce839
TableGen has a fairly dubious heuristic to decide whether an alias should be printed: does the alias have lest operands than the real instruction. This is bad enough (particularly with no way to override it), but it should at least be calculated consistently for both strings. This patch implements that logic: first get the *correct* string for the variant, in the same way as the Matcher, without guessing; then count the number of whitespace chars. There are basically 4 changes this brings about after the previous commits; all of these appear to be good, so I have changed the tests: + ARM64: we print "neg X, Y" instead of "sub X, xzr, Y". + ARM64: we skip implicit "uxtx" and "uxtw" modifiers. + Sparc: we print "mov A, B" instead of "or %g0, A, B". + Sparc: we print "fcmpX A, B" instead of "fcmpX %fcc0, A, B" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208969 91177308-0d34-0410-b5e6-96231b3b80d8
187 lines
4.4 KiB
LLVM
187 lines
4.4 KiB
LLVM
;RUN: llc -march=sparc < %s -verify-machineinstrs | FileCheck %s
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;RUN: llc -march=sparc -O0 < %s -verify-machineinstrs | FileCheck %s -check-prefix=UNOPT
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target triple = "sparc-unknown-linux-gnu"
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define i32 @test(i32 %a) nounwind {
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entry:
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; CHECK: test
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; CHECK: call bar
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; CHECK-NOT: nop
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; CHECK: ret
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; CHECK-NEXT: restore
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%0 = tail call i32 @bar(i32 %a) nounwind
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ret i32 %0
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}
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define i32 @test_jmpl(i32 (i32, i32)* nocapture %f, i32 %a, i32 %b) nounwind {
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entry:
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; CHECK: test_jmpl
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; CHECK: call
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; CHECK-NOT: nop
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; CHECK: ret
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; CHECK-NEXT: restore
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%0 = tail call i32 %f(i32 %a, i32 %b) nounwind
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ret i32 %0
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}
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define i32 @test_loop(i32 %a, i32 %b) nounwind readnone {
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; CHECK: test_loop
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entry:
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%0 = icmp sgt i32 %b, 0
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br i1 %0, label %bb, label %bb5
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bb: ; preds = %entry, %bb
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%a_addr.18 = phi i32 [ %a_addr.0, %bb ], [ %a, %entry ]
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%1 = phi i32 [ %3, %bb ], [ 0, %entry ]
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%tmp9 = mul i32 %1, %b
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%2 = and i32 %1, 1
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%tmp = xor i32 %2, 1
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%.pn = shl i32 %tmp9, %tmp
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%a_addr.0 = add i32 %.pn, %a_addr.18
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%3 = add nsw i32 %1, 1
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%exitcond = icmp eq i32 %3, %b
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;CHECK: cmp
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;CHECK: bne
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;CHECK-NOT: nop
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br i1 %exitcond, label %bb5, label %bb
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bb5: ; preds = %bb, %entry
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%a_addr.1.lcssa = phi i32 [ %a, %entry ], [ %a_addr.0, %bb ]
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;CHECK: retl
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;CHECK-NOT: restore
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ret i32 %a_addr.1.lcssa
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}
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define i32 @test_inlineasm(i32 %a) nounwind {
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entry:
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;CHECK-LABEL: test_inlineasm:
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;CHECK: sethi
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;CHECK: !NO_APP
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;CHECK-NEXT: cmp
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;CHECK-NEXT: bg
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;CHECK-NEXT: mov
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tail call void asm sideeffect "sethi 0, %g0", ""() nounwind
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%0 = icmp slt i32 %a, 0
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br i1 %0, label %bb, label %bb1
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bb: ; preds = %entry
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%1 = tail call i32 (...)* @foo(i32 %a) nounwind
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ret i32 %1
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bb1: ; preds = %entry
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%2 = tail call i32 @bar(i32 %a) nounwind
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ret i32 %2
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}
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declare i32 @foo(...)
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declare i32 @bar(i32)
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define i32 @test_implicit_def() nounwind {
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entry:
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;UNOPT-LABEL: test_implicit_def:
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;UNOPT: call func
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;UNOPT-NEXT: nop
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%0 = tail call i32 @func(i32* undef) nounwind
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ret i32 0
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}
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define i32 @prevent_o7_in_call_delay_slot(i32 %i0) {
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entry:
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;CHECK-LABEL: prevent_o7_in_call_delay_slot:
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;CHECK: add %i0, 2, %o5
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;CHECK: add %i0, 3, %o7
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;CHECK: add %o5, %o7, %o0
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;CHECK: call bar
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;CHECK-NEXT: nop
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%0 = add nsw i32 %i0, 2
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%1 = add nsw i32 %i0, 3
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tail call void asm sideeffect "", "r,r,~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{o0},~{o1},~{o2},~{o3},~{o4},~{o6},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7}"(i32 %0, i32 %1)
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%2 = add nsw i32 %0, %1
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%3 = tail call i32 @bar(i32 %2)
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ret i32 %3
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}
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declare i32 @func(i32*)
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define i32 @restore_add(i32 %a, i32 %b) {
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entry:
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;CHECK-LABEL: restore_add:
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;CHECK: ret
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;CHECK: restore %o0, %i1, %o0
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%0 = tail call i32 @bar(i32 %a) nounwind
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%1 = add nsw i32 %0, %b
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ret i32 %1
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}
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define i32 @restore_add_imm(i32 %a) {
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entry:
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;CHECK-LABEL: restore_add_imm:
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;CHECK: ret
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;CHECK: restore %o0, 20, %o0
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%0 = tail call i32 @bar(i32 %a) nounwind
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%1 = add nsw i32 %0, 20
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ret i32 %1
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}
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define i32 @restore_or(i32 %a) {
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entry:
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;CHECK-LABEL: restore_or:
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;CHECK: ret
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;CHECK: restore %g0, %o0, %o0
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%0 = tail call i32 @bar(i32 %a) nounwind
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ret i32 %0
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}
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define i32 @restore_or_imm(i32 %a) {
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entry:
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;CHECK-LABEL: restore_or_imm:
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;CHECK: or %o0, 20, %i0
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;CHECK: ret
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;CHECK-NOT: restore %g0, %g0, %g0
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;CHECK: restore
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%0 = tail call i32 @bar(i32 %a) nounwind
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%1 = or i32 %0, 20
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ret i32 %1
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}
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define i32 @restore_sethi(i32 %a) {
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entry:
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;CHECK-LABEL: restore_sethi:
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;CHECK-NOT: sethi 3
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;CHECK: restore %g0, 3072, %o0
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%0 = tail call i32 @bar(i32 %a) nounwind
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%1 = icmp ne i32 %0, 0
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%2 = select i1 %1, i32 3072, i32 0
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ret i32 %2
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}
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define i32 @restore_sethi_3bit(i32 %a) {
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entry:
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;CHECK-LABEL: restore_sethi_3bit:
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;CHECK: sethi 6
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;CHECK-NOT: restore %g0, 6144, %o0
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%0 = tail call i32 @bar(i32 %a) nounwind
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%1 = icmp ne i32 %0, 0
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%2 = select i1 %1, i32 6144, i32 0
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ret i32 %2
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}
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define i32 @restore_sethi_large(i32 %a) {
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entry:
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;CHECK-LABEL: restore_sethi_large:
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;CHECK: sethi 4000, %i0
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;CHECK-NOT: restore %g0, %g0, %g0
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;CHECK: restore
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%0 = tail call i32 @bar(i32 %a) nounwind
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%1 = icmp ne i32 %0, 0
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%2 = select i1 %1, i32 4096000, i32 0
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ret i32 %2
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}
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