llvm-6502/test/CodeGen/X86/atomic-or.ll
Eric Christopher 5d8aa345dd Fix a small thinko for constant i64 lock/orq optimization where we
we didn't have an opcode for 64-bit constant or expressions.

Fixes rdar://9692967


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134121 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 00:48:30 +00:00

19 lines
661 B
LLVM

; RUN: llc < %s -march=x86-64 | FileCheck %s
; rdar://9692967
define void @do_the_sync(i64* %p, i32 %b) nounwind {
entry:
%p.addr = alloca i64*, align 8
store i64* %p, i64** %p.addr, align 8
%tmp = load i64** %p.addr, align 8
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
; CHECK: lock
; CHECK-NEXT: orq $2147483648
%0 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %tmp, i64 2147483648)
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
ret void
}
declare i64 @llvm.atomic.load.or.i64.p0i64(i64* nocapture, i64) nounwind
declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind