Daniel Sanders 77ae274ae7 [mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6 ... Summary: There is no change to the restrictions, just the result register is stored once in the encoding rather than twice. The rt field is zero in MIPS32r6/MIPS64r6. Depends on D4119 Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4120 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211019 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-16 13:18:59 +00:00
..
invalid.s	[mips] Move CHECK lines to the same line as the instruction it's testing	2014-06-12 09:50:17 +00:00
valid-xfail.s	[mips] Correct tests that are meant to test valid assembly. They were actually rejected by GAS.	2014-05-08 15:17:29 +00:00
valid.s	[mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6	2014-06-16 13:18:59 +00:00