mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-12 02:33:33 +00:00
00e08fcaa0
Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215558 91177308-0d34-0410-b5e6-96231b3b80d8
69 lines
2.3 KiB
C++
69 lines
2.3 KiB
C++
//===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file declares the Sparc specific subclass of TargetMachine.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
|
|
#define LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
|
|
|
|
#include "SparcInstrInfo.h"
|
|
#include "SparcSubtarget.h"
|
|
#include "llvm/Target/TargetMachine.h"
|
|
|
|
namespace llvm {
|
|
|
|
class SparcTargetMachine : public LLVMTargetMachine {
|
|
SparcSubtarget Subtarget;
|
|
public:
|
|
SparcTargetMachine(const Target &T, StringRef TT,
|
|
StringRef CPU, StringRef FS, const TargetOptions &Options,
|
|
Reloc::Model RM, CodeModel::Model CM,
|
|
CodeGenOpt::Level OL, bool is64bit);
|
|
|
|
const SparcSubtarget *getSubtargetImpl() const override { return &Subtarget; }
|
|
|
|
SparcSubtarget *getSubtargetImpl() {
|
|
return static_cast<SparcSubtarget *>(TargetMachine::getSubtargetImpl());
|
|
}
|
|
|
|
// Pass Pipeline Configuration
|
|
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
|
|
bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
|
|
};
|
|
|
|
/// SparcV8TargetMachine - Sparc 32-bit target machine
|
|
///
|
|
class SparcV8TargetMachine : public SparcTargetMachine {
|
|
virtual void anchor();
|
|
public:
|
|
SparcV8TargetMachine(const Target &T, StringRef TT,
|
|
StringRef CPU, StringRef FS,
|
|
const TargetOptions &Options,
|
|
Reloc::Model RM, CodeModel::Model CM,
|
|
CodeGenOpt::Level OL);
|
|
};
|
|
|
|
/// SparcV9TargetMachine - Sparc 64-bit target machine
|
|
///
|
|
class SparcV9TargetMachine : public SparcTargetMachine {
|
|
virtual void anchor();
|
|
public:
|
|
SparcV9TargetMachine(const Target &T, StringRef TT,
|
|
StringRef CPU, StringRef FS,
|
|
const TargetOptions &Options,
|
|
Reloc::Model RM, CodeModel::Model CM,
|
|
CodeGenOpt::Level OL);
|
|
};
|
|
|
|
} // end namespace llvm
|
|
|
|
#endif
|