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https://github.com/c64scene-ar/llvm-6502.git
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77c1b73211
This handles the simplest case for mov -> push conversion: 1. x86-32 calling convention, everything is passed through the stack. 2. There is no reserved call frame. 3. Only registers or immediates are pushed, no attempt to combine a mem-reg-mem sequence into a single PUSHmm. Differential Revision: http://reviews.llvm.org/D6503 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223757 91177308-0d34-0410-b5e6-96231b3b80d8
101 lines
3.2 KiB
LLVM
101 lines
3.2 KiB
LLVM
; RUN: llc -mtriple=i686-windows -mattr=+sse2 < %s | FileCheck %s
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target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
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target triple = "i686-pc-windows-msvc"
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; There is a conflict between lowering the X86 memory intrinsics and the "base"
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; register used to address stack locals. See X86RegisterInfo::hasBaseRegister
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; for when this is necessary. Typically, we chose ESI for the base register,
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; which all of the X86 string instructions use.
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; The pattern of vector icmp and extractelement is used in these tests because
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; it forces creation of an aligned stack temporary. Perhaps such temporaries
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; shouldn't be aligned.
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declare void @escape_vla_and_icmp(i8*, i1 zeroext)
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1)
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declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1)
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define i32 @memcpy_novla_vector(<4 x i32>* %vp0, i8* %a, i8* %b, i32 %n, i1 zeroext %cond) {
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a, i8* %b, i32 128, i32 4, i1 false)
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br i1 %cond, label %spill_vectors, label %no_vectors
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no_vectors:
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ret i32 0
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spill_vectors:
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%vp1 = getelementptr <4 x i32>* %vp0, i32 1
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%v0 = load <4 x i32>* %vp0
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%v1 = load <4 x i32>* %vp1
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%vicmp = icmp slt <4 x i32> %v0, %v1
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%icmp = extractelement <4 x i1> %vicmp, i32 0
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call void @escape_vla_and_icmp(i8* null, i1 zeroext %icmp)
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%r = extractelement <4 x i32> %v0, i32 0
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ret i32 %r
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}
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; CHECK-LABEL: _memcpy_novla_vector:
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; CHECK: andl $-16, %esp
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; CHECK-DAG: movl $32, %ecx
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; CHECK-DAG: movl {{.*}}, %esi
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; CHECK-DAG: movl {{.*}}, %edi
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; CHECK: rep;movsl
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define i32 @memcpy_vla_vector(<4 x i32>* %vp0, i8* %a, i8* %b, i32 %n, i1 zeroext %cond) {
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a, i8* %b, i32 128, i32 4, i1 false)
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br i1 %cond, label %spill_vectors, label %no_vectors
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no_vectors:
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ret i32 0
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spill_vectors:
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%vp1 = getelementptr <4 x i32>* %vp0, i32 1
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%v0 = load <4 x i32>* %vp0
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%v1 = load <4 x i32>* %vp1
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%vicmp = icmp slt <4 x i32> %v0, %v1
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%icmp = extractelement <4 x i1> %vicmp, i32 0
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%vla = alloca i8, i32 %n
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call void @escape_vla_and_icmp(i8* %vla, i1 zeroext %icmp)
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%r = extractelement <4 x i32> %v0, i32 0
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ret i32 %r
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}
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; CHECK-LABEL: _memcpy_vla_vector:
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; CHECK: andl $-16, %esp
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; CHECK: movl %esp, %esi
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; CHECK: pushl $128
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; CHECK: calll _memcpy
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; CHECK: calll __chkstk
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; stosd doesn't clobber esi, so we can use it.
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define i32 @memset_vla_vector(<4 x i32>* %vp0, i8* %a, i32 %n, i1 zeroext %cond) {
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call void @llvm.memset.p0i8.i32(i8* %a, i8 42, i32 128, i32 4, i1 false)
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br i1 %cond, label %spill_vectors, label %no_vectors
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no_vectors:
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ret i32 0
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spill_vectors:
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%vp1 = getelementptr <4 x i32>* %vp0, i32 1
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%v0 = load <4 x i32>* %vp0
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%v1 = load <4 x i32>* %vp1
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%vicmp = icmp slt <4 x i32> %v0, %v1
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%icmp = extractelement <4 x i1> %vicmp, i32 0
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%vla = alloca i8, i32 %n
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call void @escape_vla_and_icmp(i8* %vla, i1 zeroext %icmp)
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%r = extractelement <4 x i32> %v0, i32 0
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ret i32 %r
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}
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; CHECK-LABEL: _memset_vla_vector:
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; CHECK: andl $-16, %esp
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; CHECK: movl %esp, %esi
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; CHECK-DAG: movl $707406378, %eax # imm = 0x2A2A2A2A
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; CHECK-DAG: movl $32, %ecx
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; CHECK-DAG: movl {{.*}}, %edi
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; CHECK-NOT: movl {{.*}}, %esi
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; CHECK: rep;stosl
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; Add a test for memcmp if we ever add a special lowering for it.
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