llvm-6502

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Jakob Stoklund Olesen 45c5c57179 Allow overlaps between virtreg and physreg live ranges. The RegisterCoalescer understands overlapping live ranges where one register is defined as a copy of the other. With this change, register allocators using LiveRegMatrix can do the same, at least for copies between physical and virtual registers. When a physreg is defined by a copy from a virtreg, allow those live ranges to overlap: %CL<def> = COPY %vreg11:sub_8bit; GR32_ABCD:%vreg11 %vreg13<def,tied1> = SAR32rCL %vreg13<tied0>, %CL<imp-use,kill> We can assign %vreg11 to %ECX, overlapping the live range of %CL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163336 91177308-0d34-0410-b5e6-96231b3b80d8	2012-09-06 18:15:23 +00:00
..
llvm	Allow overlaps between virtreg and physreg live ranges.	2012-09-06 18:15:23 +00:00
llvm-c	Make sure macros in the include subdirectory are not used without being defined.	2012-09-04 17:42:53 +00:00

Jakob Stoklund Olesen 45c5c57179 Allow overlaps between virtreg and physreg live ranges.

The RegisterCoalescer understands overlapping live ranges where one
register is defined as a copy of the other. With this change, register
allocators using LiveRegMatrix can do the same, at least for copies
between physical and virtual registers.

When a physreg is defined by a copy from a virtreg, allow those live
ranges to overlap:

  %CL<def> = COPY %vreg11:sub_8bit; GR32_ABCD:%vreg11
  %vreg13<def,tied1> = SAR32rCL %vreg13<tied0>, %CL<imp-use,kill>

We can assign %vreg11 to %ECX, overlapping the live range of %CL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163336 91177308-0d34-0410-b5e6-96231b3b80d8

2012-09-06 18:15:23 +00:00

llvm

Allow overlaps between virtreg and physreg live ranges.

2012-09-06 18:15:23 +00:00

llvm-c

Make sure macros in the include subdirectory are not used without being defined.

2012-09-04 17:42:53 +00:00