Eric Christopher 77ed1353bf Go ahead and emit the barrier on x86-64 even without sse2. The ...

processor supports it just fine.

Fixes PR9675 and rdar://9740801


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134664 91177308-0d34-0410-b5e6-96231b3b80d8

2011-07-08 00:04:56 +00:00

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Alpha

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ARM

Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.

2011-07-07 03:55:05 +00:00

Blackfin

Remove support for parsing the "type i32" syntax for defining a numbered

2011-06-19 00:03:46 +00:00

CBackend

Add support for sadd.with.overflow and uadd.with.overflow intrinsics to the CBackend by emitting definitions for each intrinsic that occurs in the module.

2011-06-21 17:18:15 +00:00

CellSPU

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CPP

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Generic

Added a testcase for PR10220.

2011-07-07 00:36:02 +00:00

MBlaze

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Mips

Change the chain input of nodes that load the address of a function. This change

2011-06-24 19:01:25 +00:00

MSP430

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PowerPC

Implement ISD::VAARG lowering on PPC32.

2011-06-28 15:30:42 +00:00

PTX

PTX: corrected tests that were failing

2011-06-25 19:41:17 +00:00

SPARC

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SystemZ

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Thumb

Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.

2011-07-07 03:55:05 +00:00

Thumb2

Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.

2011-07-07 03:55:05 +00:00

X86

Go ahead and emit the barrier on x86-64 even without sse2. The

2011-07-08 00:04:56 +00:00

XCore

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