llvm-6502/test/CodeGen
Matthias Braun 7839b00d43 X86: Rework inline asm integer register specification.
This is a new version of http://reviews.llvm.org/D10260.

It turned out that when you specify an integer register in inline asm on
x86 you get the register of the required type size back. That means that
X86TargetLowering::getRegForInlineAsmConstraint() has to accept any of
the integer registers and adapt its size to the given target size which
may be any 8/16/32/64 bit sized type. Surprisingly that means given a
constraint of "{ax}" and a type of MVT::F32 we need to return X86::EAX.

This change makes this face explicit, the previous code seemed like
working by accident because there it never returned an error once a
register was found. On the other hand this rewrite allows to actually
return errors for invalid situations like requesting an integer register
for an i128 type.

Related to rdar://21042280

Differential Revision: http://reviews.llvm.org/D10813

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241002 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 21:35:51 +00:00
..
AArch64 [AArch64] Lower interleaved memory accesses to ldN/stN intrinsics. This patch also adds a function to calculate the cost of interleaved memory accesses. 2015-06-26 02:32:07 +00:00
AMDGPU AMDGPU/SI: Fix extra space when printing v_div_fmas_* 2015-06-28 18:16:14 +00:00
ARM [ARM]: Extend -mfpu options for half-precision and vfpv3xd 2015-06-29 09:32:29 +00:00
BPF [bpf] rename triple names bpf_be -> bpfeb 2015-06-05 16:11:14 +00:00
CPP [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
Generic Move the personality function from LandingPadInst to Function 2015-06-17 20:52:32 +00:00
Hexagon [Hexagon] Printing packet brackets when asm printing and adding a number of tests that test packet brackets. 2015-06-18 20:43:50 +00:00
Inputs IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
Mips Fix "the the" in comments. 2015-06-19 01:53:21 +00:00
MIR MIR Serialization: Serialize the register mask machine operands. 2015-06-29 16:57:06 +00:00
MSP430
NVPTX [NVPTX] noop when kernel pointers are already global 2015-06-26 22:35:43 +00:00
PowerPC Add missing builtins to the PPC back end for ABI compliance (vol. 1) 2015-06-26 19:26:53 +00:00
SPARC Revert r240302 ("Bring r240130 back."). 2015-06-23 11:31:32 +00:00
SystemZ [DAGCombiner] Account for getVectorIdxTy() when narrowing vector load 2015-05-05 19:34:10 +00:00
Thumb Move the personality function from LandingPadInst to Function 2015-06-17 20:52:32 +00:00
Thumb2 ARMLoadStoreOptimizer: Fix errata 602117 handling and make testcase actually test for it 2015-06-24 20:03:27 +00:00
WinEH [Verifier] Verify invokes of intrinsics 2015-06-26 21:39:44 +00:00
X86 X86: Rework inline asm integer register specification. 2015-06-29 21:35:51 +00:00
XCore Move the personality function from LandingPadInst to Function 2015-06-17 20:52:32 +00:00