Vikram S. Adve 78a4f23a8e Added special register class containing (for now) %fsr. ... Fixed spilling of %fcc[0-3] which are part of %fsr. Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6339 91177308-0d34-0410-b5e6-96231b3b80d8		2003-05-27 00:02:22 +00:00
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Analysis
Archive
AsmParser
Bytecode	Fix bug: Assembler/2003-05-03-BytecodeReaderProblem.llx	2003-05-22 18:35:38 +00:00
CodeGen	Cleaned up code layout. No functional changes.	2003-05-22 21:49:18 +00:00
ExecutionEngine
Linker
Support	Add using declarations	2003-05-22 21:59:35 +00:00
Target	Added special register class containing (for now) %fsr.	2003-05-27 00:02:22 +00:00
Transforms	Fix bug: InstCombine/2003-05-26-CastMiscompile.ll	2003-05-26 23:41:32 +00:00
VMCore	Fix problem with last checkin.	2003-05-25 16:15:32 +00:00
Makefile