Tom Stellard 78d1e95201 R600: Promote i64 stores to v2i32 ...

Now we need only one 64-bit pattern for stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211643 91177308-0d34-0410-b5e6-96231b3b80d8

2014-06-24 23:33:04 +00:00

..

AArch64

Resubmit commit r211533

2014-06-24 16:21:38 +00:00

ARM

Fix up scoping in a few tests (and delete one that validates unnecessary behavior).

2014-06-24 20:10:27 +00:00

CPP

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Generic

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Hexagon

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

Inputs

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Mips

Print a=b as an assignment.

2014-06-24 22:45:16 +00:00

MSP430

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

NVPTX

Canonicalize addrspacecast ConstExpr between different pointer types

2014-06-15 21:40:57 +00:00

PowerPC

[PPC64] Fix PR20071 (fctiduz generated for targets lacking that instruction)

2014-06-24 20:05:18 +00:00

R600

R600: Promote i64 stores to v2i32

2014-06-24 23:33:04 +00:00

SPARC

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

SystemZ

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Thumb

ARM: Fix fastcc calling convention for Thumb1

2014-06-13 08:33:03 +00:00

Thumb2

ARM: Fix TPsoft for Thumb mode

2014-06-24 15:45:59 +00:00

X86

Fix up scoping in a few tests (and delete one that validates unnecessary behavior).

2014-06-24 20:10:27 +00:00

XCore

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00