mirror of
https://github.com/c64scene-ar/llvm-6502.git
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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
224 lines
5.2 KiB
Plaintext
224 lines
5.2 KiB
Plaintext
# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
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#==---------------------------------------------------------------------------==
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# 5.4.2 Logical (immediate)
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#==---------------------------------------------------------------------------==
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0x00 0x00 0x00 0x12
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0x00 0x00 0x40 0x92
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0x41 0x0c 0x00 0x12
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0x41 0x0c 0x40 0x92
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0xbf 0xec 0x7c 0x92
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0x00 0x00 0x00 0x72
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0x00 0x00 0x40 0xf2
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0x41 0x0c 0x00 0x72
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0x41 0x0c 0x40 0xf2
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0x5f 0x0c 0x40 0xf2
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# CHECK: and w0, w0, #0x1
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# CHECK: and x0, x0, #0x1
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# CHECK: and w1, w2, #0xf
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# CHECK: and x1, x2, #0xf
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# CHECK: and sp, x5, #0xfffffffffffffff0
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# CHECK: ands w0, w0, #0x1
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# CHECK: ands x0, x0, #0x1
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# CHECK: ands w1, w2, #0xf
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# CHECK: ands x1, x2, #0xf
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# CHECK: tst x2, #0xf
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0x41 0x00 0x12 0x52
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0x41 0x00 0x71 0xd2
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0x5f 0x00 0x71 0xd2
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# CHECK: eor w1, w2, #0x4000
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# CHECK: eor x1, x2, #0x8000
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# CHECK: eor sp, x2, #0x8000
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0x41 0x00 0x12 0x32
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0x41 0x00 0x71 0xb2
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0x5f 0x00 0x71 0xb2
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# CHECK: orr w1, w2, #0x4000
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# CHECK: orr x1, x2, #0x8000
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# CHECK: orr sp, x2, #0x8000
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#==---------------------------------------------------------------------------==
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# 5.5.3 Logical (shifted register)
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#==---------------------------------------------------------------------------==
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0x41 0x00 0x03 0x0a
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0x41 0x00 0x03 0x8a
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0x41 0x08 0x03 0x0a
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0x41 0x08 0x03 0x8a
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0x41 0x08 0x43 0x0a
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0x41 0x08 0x43 0x8a
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0x41 0x08 0x83 0x0a
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0x41 0x08 0x83 0x8a
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0x41 0x08 0xc3 0x0a
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0x41 0x08 0xc3 0x8a
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# CHECK: and w1, w2, w3
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# CHECK: and x1, x2, x3
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# CHECK: and w1, w2, w3, lsl #2
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# CHECK: and x1, x2, x3, lsl #2
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# CHECK: and w1, w2, w3, lsr #2
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# CHECK: and x1, x2, x3, lsr #2
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# CHECK: and w1, w2, w3, asr #2
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# CHECK: and x1, x2, x3, asr #2
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# CHECK: and w1, w2, w3, ror #2
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# CHECK: and x1, x2, x3, ror #2
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0x41 0x00 0x03 0x6a
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0x41 0x00 0x03 0xea
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0x41 0x08 0x03 0x6a
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0x41 0x08 0x03 0xea
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0x41 0x08 0x43 0x6a
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0x41 0x08 0x43 0xea
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0x41 0x08 0x83 0x6a
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0x41 0x08 0x83 0xea
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0x41 0x08 0xc3 0x6a
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0x41 0x08 0xc3 0xea
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# CHECK: ands w1, w2, w3
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# CHECK: ands x1, x2, x3
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# CHECK: ands w1, w2, w3, lsl #2
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# CHECK: ands x1, x2, x3, lsl #2
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# CHECK: ands w1, w2, w3, lsr #2
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# CHECK: ands x1, x2, x3, lsr #2
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# CHECK: ands w1, w2, w3, asr #2
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# CHECK: ands x1, x2, x3, asr #2
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# CHECK: ands w1, w2, w3, ror #2
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# CHECK: ands x1, x2, x3, ror #2
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0x41 0x00 0x23 0x0a
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0x41 0x00 0x23 0x8a
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0x41 0x0c 0x23 0x0a
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0x41 0x0c 0x23 0x8a
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0x41 0x0c 0x63 0x0a
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0x41 0x0c 0x63 0x8a
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0x41 0x0c 0xa3 0x0a
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0x41 0x0c 0xa3 0x8a
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0x41 0x0c 0xe3 0x0a
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0x41 0x0c 0xe3 0x8a
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# CHECK: bic w1, w2, w3
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# CHECK: bic x1, x2, x3
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# CHECK: bic w1, w2, w3, lsl #3
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# CHECK: bic x1, x2, x3, lsl #3
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# CHECK: bic w1, w2, w3, lsr #3
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# CHECK: bic x1, x2, x3, lsr #3
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# CHECK: bic w1, w2, w3, asr #3
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# CHECK: bic x1, x2, x3, asr #3
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# CHECK: bic w1, w2, w3, ror #3
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# CHECK: bic x1, x2, x3, ror #3
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0x41 0x00 0x23 0x6a
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0x41 0x00 0x23 0xea
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0x41 0x0c 0x23 0x6a
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0x41 0x0c 0x23 0xea
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0x41 0x0c 0x63 0x6a
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0x41 0x0c 0x63 0xea
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0x41 0x0c 0xa3 0x6a
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0x41 0x0c 0xa3 0xea
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0x41 0x0c 0xe3 0x6a
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0x41 0x0c 0xe3 0xea
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# CHECK: bics w1, w2, w3
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# CHECK: bics x1, x2, x3
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# CHECK: bics w1, w2, w3, lsl #3
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# CHECK: bics x1, x2, x3, lsl #3
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# CHECK: bics w1, w2, w3, lsr #3
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# CHECK: bics x1, x2, x3, lsr #3
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# CHECK: bics w1, w2, w3, asr #3
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# CHECK: bics x1, x2, x3, asr #3
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# CHECK: bics w1, w2, w3, ror #3
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# CHECK: bics x1, x2, x3, ror #3
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0x41 0x00 0x23 0x4a
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0x41 0x00 0x23 0xca
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0x41 0x10 0x23 0x4a
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0x41 0x10 0x23 0xca
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0x41 0x10 0x63 0x4a
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0x41 0x10 0x63 0xca
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0x41 0x10 0xa3 0x4a
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0x41 0x10 0xa3 0xca
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0x41 0x10 0xe3 0x4a
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0x41 0x10 0xe3 0xca
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# CHECK: eon w1, w2, w3
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# CHECK: eon x1, x2, x3
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# CHECK: eon w1, w2, w3, lsl #4
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# CHECK: eon x1, x2, x3, lsl #4
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# CHECK: eon w1, w2, w3, lsr #4
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# CHECK: eon x1, x2, x3, lsr #4
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# CHECK: eon w1, w2, w3, asr #4
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# CHECK: eon x1, x2, x3, asr #4
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# CHECK: eon w1, w2, w3, ror #4
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# CHECK: eon x1, x2, x3, ror #4
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0x41 0x00 0x03 0x4a
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0x41 0x00 0x03 0xca
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0x41 0x14 0x03 0x4a
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0x41 0x14 0x03 0xca
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0x41 0x14 0x43 0x4a
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0x41 0x14 0x43 0xca
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0x41 0x14 0x83 0x4a
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0x41 0x14 0x83 0xca
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0x41 0x14 0xc3 0x4a
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0x41 0x14 0xc3 0xca
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# CHECK: eor w1, w2, w3
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# CHECK: eor x1, x2, x3
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# CHECK: eor w1, w2, w3, lsl #5
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# CHECK: eor x1, x2, x3, lsl #5
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# CHECK: eor w1, w2, w3, lsr #5
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# CHECK: eor x1, x2, x3, lsr #5
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# CHECK: eor w1, w2, w3, asr #5
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# CHECK: eor x1, x2, x3, asr #5
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# CHECK: eor w1, w2, w3, ror #5
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# CHECK: eor x1, x2, x3, ror #5
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0x41 0x00 0x03 0x2a
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0x41 0x00 0x03 0xaa
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0x41 0x18 0x03 0x2a
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0x41 0x18 0x03 0xaa
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0x41 0x18 0x43 0x2a
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0x41 0x18 0x43 0xaa
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0x41 0x18 0x83 0x2a
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0x41 0x18 0x83 0xaa
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0x41 0x18 0xc3 0x2a
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0x41 0x18 0xc3 0xaa
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# CHECK: orr w1, w2, w3
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# CHECK: orr x1, x2, x3
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# CHECK: orr w1, w2, w3, lsl #6
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# CHECK: orr x1, x2, x3, lsl #6
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# CHECK: orr w1, w2, w3, lsr #6
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# CHECK: orr x1, x2, x3, lsr #6
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# CHECK: orr w1, w2, w3, asr #6
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# CHECK: orr x1, x2, x3, asr #6
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# CHECK: orr w1, w2, w3, ror #6
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# CHECK: orr x1, x2, x3, ror #6
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0x41 0x00 0x23 0x2a
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0x41 0x00 0x23 0xaa
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0x41 0x1c 0x23 0x2a
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0x41 0x1c 0x23 0xaa
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0x41 0x1c 0x63 0x2a
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0x41 0x1c 0x63 0xaa
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0x41 0x1c 0xa3 0x2a
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0x41 0x1c 0xa3 0xaa
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0x41 0x1c 0xe3 0x2a
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0x41 0x1c 0xe3 0xaa
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# CHECK: orn w1, w2, w3
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# CHECK: orn x1, x2, x3
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# CHECK: orn w1, w2, w3, lsl #7
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# CHECK: orn x1, x2, x3, lsl #7
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# CHECK: orn w1, w2, w3, lsr #7
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# CHECK: orn x1, x2, x3, lsr #7
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# CHECK: orn w1, w2, w3, asr #7
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# CHECK: orn x1, x2, x3, asr #7
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# CHECK: orn w1, w2, w3, ror #7
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# CHECK: orn x1, x2, x3, ror #7
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