llvm-6502/test/CodeGen
Juergen Ributzka 78f686d37c Reapply [FastISel][AArch64] Make use of the zero register when possible (r215591).
Note: This was originally reverted to track down a buildbot error. Reapply
without any modifications.

Original commit message:
This change materializes now the value "0" from the zero register.
The zero register can be folded by several instruction, so no
materialization is need at all.

Fixes <rdar://problem/17924413>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216009 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 19:44:02 +00:00
..
AArch64 Reapply [FastISel][AArch64] Make use of the zero register when possible (r215591). 2014-08-19 19:44:02 +00:00
ARM Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588). 2014-08-19 19:05:24 +00:00
CPP
Generic Use "weak alias" instead of "alias weak" 2014-07-30 22:51:54 +00:00
Hexagon DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range. 2014-08-06 00:21:25 +00:00
Inputs
Mips Fix fmul combines with constant splat vectors 2014-08-16 10:14:19 +00:00
MSP430
NVPTX [NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types 2014-07-23 20:23:49 +00:00
PowerPC Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588). 2014-08-19 19:05:24 +00:00
R600 R600/SI: Move all fabs / fneg handling to patterns 2014-08-15 18:42:22 +00:00
SPARC
SystemZ
Thumb ARM: Fix and re-enable load/store optimizer for Thumb1. 2014-08-15 17:00:30 +00:00
Thumb2 ARM: do not generate BLX instructions on Cortex-M CPUs. 2014-08-06 11:13:14 +00:00
X86 Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588). 2014-08-19 19:05:24 +00:00
XCore