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https://github.com/c64scene-ar/llvm-6502.git
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d954716e75
These are extensions of the existing FI[EDX]BR instructions, but use a spare bit to suppress inexact conditions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188894 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
1.6 KiB
TableGen
46 lines
1.6 KiB
TableGen
//===-- SystemZ.td - SystemZ processors and features ---------*- tblgen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Processor and feature definitions.
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//
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//===----------------------------------------------------------------------===//
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class SystemZFeature<string extname, string intname, string desc>
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: Predicate<"Subtarget.has"##intname##"()">,
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AssemblerPredicate<"Feature"##intname, extname>,
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SubtargetFeature<extname, "Has"##intname, "true", desc>;
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def FeatureDistinctOps : SystemZFeature<
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"distinct-ops", "DistinctOps",
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"Assume that the distinct-operands facility is installed"
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>;
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def FeatureLoadStoreOnCond : SystemZFeature<
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"load-store-on-cond", "LoadStoreOnCond",
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"Assume that the load/store-on-condition facility is installed"
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>;
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def FeatureHighWord : SystemZFeature<
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"high-word", "HighWord",
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"Assume that the high-word facility is installed"
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>;
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def FeatureFPExtension : SystemZFeature<
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"fp-extension", "FPExtension",
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"Assume that the floating-point extension facility is installed"
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>;
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def : Processor<"z10", NoItineraries, []>;
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def : Processor<"z196", NoItineraries,
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[FeatureDistinctOps, FeatureLoadStoreOnCond, FeatureHighWord,
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FeatureFPExtension]>;
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def : Processor<"zEC12", NoItineraries,
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[FeatureDistinctOps, FeatureLoadStoreOnCond, FeatureHighWord,
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FeatureFPExtension]>;
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