llvm-6502/test/CodeGen
Richard Osborne 79a73fbeb3 Add dag combine to simplify lmul(x, 0, a, b)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98258 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-11 16:26:35 +00:00
..
Alpha Fix PR2590 by making PatternSortingPredicate actually be 2010-03-01 22:09:11 +00:00
ARM Enable machine cse pass. 2010-03-10 03:07:41 +00:00
Blackfin Change the scheduler from adding nodes in allnodes order 2010-02-24 06:11:37 +00:00
CBackend
CellSPU fix bss section printing for cell, patch by Kalle Raiskila! 2010-03-05 18:55:36 +00:00
CPP
Generic stop using anders-aa 2010-03-01 20:24:05 +00:00
MBlaze Re-committing the failed r97807 commit with changes to eliminate warnings. 2010-03-06 23:23:12 +00:00
Mips
MSP430 Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though). 2010-03-06 11:41:12 +00:00
PIC16 this testcase is failing because pic16 doesn't define a reg/reg 2010-03-02 20:48:24 +00:00
PowerPC Enable machine cse pass. 2010-03-10 03:07:41 +00:00
SPARC
SystemZ
Thumb Enable machine cse pass. 2010-03-10 03:07:41 +00:00
Thumb2 Enable machine cse pass. 2010-03-10 03:07:41 +00:00
X86 The check for coalescing a virtual register to a physical register, e.g. 2010-03-11 08:20:21 +00:00
XCore Add dag combine to simplify lmul(x, 0, a, b) 2010-03-11 16:26:35 +00:00