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NVPTXISelDAGToDAG translates "addrspacecast to param" to NVPTX::nvvm_ptr_gen_to_param Added an llc test in bug21465. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239100 91177308-0d34-0410-b5e6-96231b3b80d8
171 lines
5.9 KiB
C++
171 lines
5.9 KiB
C++
//===-- NVPTXLowerKernelArgs.cpp - Lower kernel arguments -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Pointer arguments to kernel functions need to be lowered specially.
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//
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// 1. Copy byval struct args to local memory. This is a preparation for handling
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// cases like
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//
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// kernel void foo(struct A arg, ...)
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// {
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// struct A *p = &arg;
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// ...
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// ... = p->filed1 ... (this is no generic address for .param)
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// p->filed2 = ... (this is no write access to .param)
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// }
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//
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// 2. Convert non-byval pointer arguments of CUDA kernels to pointers in the
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// global address space. This allows later optimizations to emit
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// ld.global.*/st.global.* for accessing these pointer arguments. For
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// example,
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//
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// define void @foo(float* %input) {
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// %v = load float, float* %input, align 4
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// ...
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// }
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//
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// becomes
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//
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// define void @foo(float* %input) {
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// %input2 = addrspacecast float* %input to float addrspace(1)*
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// %input3 = addrspacecast float addrspace(1)* %input2 to float*
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// %v = load float, float* %input3, align 4
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// ...
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// }
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//
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// Later, NVPTXFavorNonGenericAddrSpaces will optimize it to
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//
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// define void @foo(float* %input) {
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// %input2 = addrspacecast float* %input to float addrspace(1)*
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// %v = load float, float addrspace(1)* %input2, align 4
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// ...
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// }
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//
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// TODO: merge this pass with NVPTXFavorNonGenericAddrSpace so that other passes
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// don't cancel the addrspacecast pair this pass emits.
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//===----------------------------------------------------------------------===//
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#include "NVPTX.h"
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#include "NVPTXUtilities.h"
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#include "NVPTXTargetMachine.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Pass.h"
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using namespace llvm;
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namespace llvm {
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void initializeNVPTXLowerKernelArgsPass(PassRegistry &);
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}
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namespace {
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class NVPTXLowerKernelArgs : public FunctionPass {
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bool runOnFunction(Function &F) override;
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// handle byval parameters
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void handleByValParam(Argument *);
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// handle non-byval pointer parameters
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void handlePointerParam(Argument *);
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public:
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static char ID; // Pass identification, replacement for typeid
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NVPTXLowerKernelArgs(const NVPTXTargetMachine *TM = nullptr)
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: FunctionPass(ID), TM(TM) {}
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const char *getPassName() const override {
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return "Lower pointer arguments of CUDA kernels";
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}
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private:
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const NVPTXTargetMachine *TM;
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};
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} // namespace
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char NVPTXLowerKernelArgs::ID = 1;
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INITIALIZE_PASS(NVPTXLowerKernelArgs, "nvptx-lower-kernel-args",
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"Lower kernel arguments (NVPTX)", false, false)
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// =============================================================================
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// If the function had a byval struct ptr arg, say foo(%struct.x *byval %d),
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// then add the following instructions to the first basic block:
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//
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// %temp = alloca %struct.x, align 8
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// %tempd = addrspacecast %struct.x* %d to %struct.x addrspace(101)*
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// %tv = load %struct.x addrspace(101)* %tempd
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// store %struct.x %tv, %struct.x* %temp, align 8
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//
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// The above code allocates some space in the stack and copies the incoming
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// struct from param space to local space.
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// Then replace all occurences of %d by %temp.
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// =============================================================================
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void NVPTXLowerKernelArgs::handleByValParam(Argument *Arg) {
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Function *Func = Arg->getParent();
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Instruction *FirstInst = &(Func->getEntryBlock().front());
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PointerType *PType = dyn_cast<PointerType>(Arg->getType());
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assert(PType && "Expecting pointer type in handleByValParam");
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Type *StructType = PType->getElementType();
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AllocaInst *AllocA = new AllocaInst(StructType, Arg->getName(), FirstInst);
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// Set the alignment to alignment of the byval parameter. This is because,
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// later load/stores assume that alignment, and we are going to replace
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// the use of the byval parameter with this alloca instruction.
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AllocA->setAlignment(Func->getParamAlignment(Arg->getArgNo() + 1));
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Arg->replaceAllUsesWith(AllocA);
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Value *ArgInParam = new AddrSpaceCastInst(
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Arg, PointerType::get(StructType, ADDRESS_SPACE_PARAM), Arg->getName(),
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FirstInst);
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LoadInst *LI = new LoadInst(ArgInParam, Arg->getName(), FirstInst);
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new StoreInst(LI, AllocA, FirstInst);
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}
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void NVPTXLowerKernelArgs::handlePointerParam(Argument *Arg) {
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assert(!Arg->hasByValAttr() &&
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"byval params should be handled by handleByValParam");
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Instruction *FirstInst = Arg->getParent()->getEntryBlock().begin();
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Instruction *ArgInGlobal = new AddrSpaceCastInst(
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Arg, PointerType::get(Arg->getType()->getPointerElementType(),
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ADDRESS_SPACE_GLOBAL),
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Arg->getName(), FirstInst);
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Value *ArgInGeneric = new AddrSpaceCastInst(ArgInGlobal, Arg->getType(),
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Arg->getName(), FirstInst);
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// Replace with ArgInGeneric all uses of Args except ArgInGlobal.
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Arg->replaceAllUsesWith(ArgInGeneric);
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ArgInGlobal->setOperand(0, Arg);
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}
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// =============================================================================
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// Main function for this pass.
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// =============================================================================
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bool NVPTXLowerKernelArgs::runOnFunction(Function &F) {
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// Skip non-kernels. See the comments at the top of this file.
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if (!isKernelFunction(F))
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return false;
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for (Argument &Arg : F.args()) {
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if (Arg.getType()->isPointerTy()) {
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if (Arg.hasByValAttr())
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handleByValParam(&Arg);
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else if (TM && TM->getDrvInterface() == NVPTX::CUDA)
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handlePointerParam(&Arg);
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}
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}
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return true;
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}
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FunctionPass *
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llvm::createNVPTXLowerKernelArgsPass(const NVPTXTargetMachine *TM) {
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return new NVPTXLowerKernelArgs(TM);
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}
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