llvm-6502/test/CodeGen/Blackfin/ctlz64.ll
Jakob Stoklund Olesen d950941e13 Analog Devices Blackfin back-end.
Generate code for the Blackfin family of DSPs from Analog Devices:

  http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html
  
We aim to be compatible with the exsisting GNU toolchain found at:

  http://blackfin.uclinux.org/gf/project/toolchain
  
The back-end is experimental.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 17:32:10 +00:00

16 lines
575 B
LLVM

; RUN: llvm-as < %s | llc -march=bfin -verify-machineinstrs > %t
@.str = external constant [14 x i8] ; <[14 x i8]*> [#uses=1]
define i32 @main(i64 %arg) nounwind {
entry:
%tmp47 = tail call i64 @llvm.cttz.i64(i64 %arg) ; <i64> [#uses=1]
%tmp48 = trunc i64 %tmp47 to i32 ; <i32> [#uses=1]
%tmp40 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([14 x i8]* @.str, i32 0, i32 0), i64 %arg, i32 0, i32 %tmp48, i32 0) nounwind ; <i32> [#uses=0]
ret i32 0
}
declare i32 @printf(i8* noalias, ...) nounwind
declare i64 @llvm.cttz.i64(i64) nounwind readnone