llvm-6502/test
Chandler Carruth 10cd8098a7 [x86] Teach the instruction lowering to add comments describing constant
pool data being loaded into a vector register.

The comments take the form of:

  # ymm0 = [a,b,c,d,...]
  # xmm1 = <x,y,z...>

The []s are used for generic sequential data and the <>s are used for
specifically ConstantVector loads. Undef elements are printed as the
letter 'u', integers in decimal, and floating point values as floating
point values. Suggestions on improving the formatting or other aspects
of the display are very welcome.

My primary use case for this is to be able to FileCheck test masks
passed to vector shuffle instructions in-register. It isn't fantastic
for that (no decoding special zeroing semantics or other tricks), but it
at least puts the mask onto an instruction line that could reasonably be
checked. I've updated many of the new vector shuffle lowering tests to
leverage this in their test cases so that we're actually checking the
shuffle masks remain as expected.

Before implementing this, I tried a *bunch* of different approaches.
I looked into teaching the MCInstLower code to scan up the basic block
and find a definition of a register used in a shuffle instruction and
then decode that, but this seems incredibly brittle and complex.
I talked to Hal a lot about the "right" way to do this: attach the raw
shuffle mask to the instruction itself in some form of unencoded
operands, and then use that to emit the comments. I still think that's
the optimal solution here, but it proved to be beyond what I'm up for
here. In particular, it seems likely best done by completing the
plumbing of metadata through these layers and attaching the shuffle mask
in metadata which could have fully automatic dropping when encoding an
actual instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218377 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 09:39:41 +00:00
..
Analysis AVX-512: added cost for some AVX-512 instructions 2014-09-16 07:57:37 +00:00
Assembler [inline asm] Add a check in InlineAsm::ConstraintInfo::Parse to make sure '{' 2014-09-05 22:30:32 +00:00
Bindings Restore the ability to check if LLVMCreateObjectFile was successful 2014-09-05 21:22:09 +00:00
Bitcode Ensure bitcode encoding stays stable. 2014-09-23 08:48:01 +00:00
BugPoint
CodeGen [x86] Teach the instruction lowering to add comments describing constant 2014-09-24 09:39:41 +00:00
DebugInfo Fix segfault in AArch64 backend with -g and -mbig-endian 2014-09-23 15:38:11 +00:00
ExecutionEngine [MCJIT] Make sure we test ARM BR24 relocations with both internal and external 2014-09-11 22:43:36 +00:00
Feature [AArch64] Update test case to pass with post-RA MI scheduler. 2014-09-13 03:23:23 +00:00
FileCheck
Instrumentation [asan-assembly-instrumentation] Added CFI directives to the generated instrumentation code. 2014-09-10 09:45:49 +00:00
Integer
JitListener
Linker Merge alignment of common GlobalValue. 2014-09-09 17:48:18 +00:00
LTO Try to fix i686-cygming bots. 2014-09-18 22:56:00 +00:00
MC AArch64: allow constant expressions for shifted reg literals 2014-09-23 22:16:02 +00:00
Object Nuke MCAnalysis. 2014-09-02 22:32:20 +00:00
Other [lit] Parse all strings as UTF-8 rather than ASCII. 2014-09-12 16:46:05 +00:00
TableGen [TableGen] Fully resolve class-instance values before defs in multiclasses 2014-09-16 17:14:13 +00:00
tools Rebuild the inputs for the codeview-linetables.test with VS2013 2014-09-23 13:49:51 +00:00
Transforms GlobalOpt: Preserve comdats of unoptimized initializers 2014-09-23 22:33:01 +00:00
Unit
Verifier Verifier: Don't reject varargs callee cleanup functions 2014-08-29 21:25:28 +00:00
YAMLParser
.clang-format
CMakeLists.txt Add LLVMgold target to test dependencies. 2014-09-10 22:20:49 +00:00
lit.cfg Exclude known and bugzilled failures from UBSan bootstrap 2014-09-17 20:17:52 +00:00
lit.site.cfg.in
Makefile Delete support for AuroraUX. 2014-08-14 15:15:09 +00:00
Makefile.tests
TestRunner.sh