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04bcc11905
derived classes. Since global data alignment, layout, and mangling is often based on the DataLayout, move it to the TargetMachine. This ensures that global data is going to be layed out and mangled consistently if the subtarget changes on a per function basis. Prior to this all targets(*) have had subtarget dependent code moved out and onto the TargetMachine. *One target hasn't been migrated as part of this change: R600. The R600 port has, as a subtarget feature, the size of pointers and this affects global data layout. I've currently hacked in a FIXME to enable progress, but the port needs to be updated to either pass the 64-bitness to the TargetMachine, or fix the DataLayout to avoid subtarget dependent features. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227113 91177308-0d34-0410-b5e6-96231b3b80d8
80 lines
2.6 KiB
C++
80 lines
2.6 KiB
C++
//===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the PowerPC specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETMACHINE_H
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#define LLVM_LIB_TARGET_POWERPC_PPCTARGETMACHINE_H
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#include "PPCInstrInfo.h"
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#include "PPCSubtarget.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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/// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
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///
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class PPCTargetMachine : public LLVMTargetMachine {
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std::unique_ptr<TargetLoweringObjectFile> TLOF;
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// Calculates type size & alignment
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const DataLayout DL;
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PPCSubtarget Subtarget;
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mutable StringMap<std::unique_ptr<PPCSubtarget>> SubtargetMap;
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public:
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PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
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const TargetOptions &Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OL);
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~PPCTargetMachine() override;
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const DataLayout *getDataLayout() const override { return &DL; }
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const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; }
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const PPCSubtarget *getSubtargetImpl(const Function &F) const override;
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// Pass Pipeline Configuration
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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/// \brief Register PPC analysis passes with a pass manager.
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void addAnalysisPasses(PassManagerBase &PM) override;
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TargetLoweringObjectFile *getObjFileLowering() const override {
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return TLOF.get();
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}
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};
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/// PPC32TargetMachine - PowerPC 32-bit target machine.
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///
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class PPC32TargetMachine : public PPCTargetMachine {
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virtual void anchor();
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public:
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PPC32TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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/// PPC64TargetMachine - PowerPC 64-bit target machine.
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///
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class PPC64TargetMachine : public PPCTargetMachine {
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virtual void anchor();
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public:
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PPC64TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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} // end namespace llvm
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#endif
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