llvm-6502/test/MC/ARM/crc32.s
Bernard Ogden 47c6d17b1c ARM: Add subtarget feature for CRC
Adds a subtarget feature for the CRC instructions (optional in v8-A) to the ARM (32-bit) backend.

Differential Revision: http://llvm-reviews.chandlerc.com/D2036

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193599 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-29 09:47:35 +00:00

31 lines
1.5 KiB
ArmAsm

@ RUN: llvm-mc -triple=armv8 -show-encoding < %s | FileCheck %s
@ RUN: not llvm-mc -triple=armv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
@ RUN: not llvm-mc -triple=thumbv8 -mattr=-crc -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-NOCRC
crc32b r0, r1, r2
crc32h r0, r1, r2
crc32w r0, r1, r2
@ CHECK: crc32b r0, r1, r2 @ encoding: [0x42,0x00,0x01,0xe1]
@ CHECK: crc32h r0, r1, r2 @ encoding: [0x42,0x00,0x21,0xe1]
@ CHECK: crc32w r0, r1, r2 @ encoding: [0x42,0x00,0x41,0xe1]
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-NOCRC: error: instruction requires: crc
@ CHECK-NOCRC: error: instruction requires: crc
@ CHECK-NOCRC: error: instruction requires: crc
crc32cb r0, r1, r2
crc32ch r0, r1, r2
crc32cw r0, r1, r2
@ CHECK: crc32cb r0, r1, r2 @ encoding: [0x42,0x02,0x01,0xe1]
@ CHECK: crc32ch r0, r1, r2 @ encoding: [0x42,0x02,0x21,0xe1]
@ CHECK: crc32cw r0, r1, r2 @ encoding: [0x42,0x02,0x41,0xe1]
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-V7: error: instruction requires: crc armv8
@ CHECK-NOCRC: error: instruction requires: crc
@ CHECK-NOCRC: error: instruction requires: crc
@ CHECK-NOCRC: error: instruction requires: crc