llvm-6502/lib/Target/IA64/IA64TargetAsmInfo.cpp
Anton Korobeynikov dc3ca2ec3c Switch IA64 to new section-handling stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54453 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:52:35 +00:00

38 lines
1.2 KiB
C++

//===-- IA64TargetAsmInfo.cpp - IA64 asm properties -------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the declarations of the IA64TargetAsmInfo properties.
//
//===----------------------------------------------------------------------===//
#include "IA64TargetAsmInfo.h"
using namespace llvm;
IA64TargetAsmInfo::IA64TargetAsmInfo(const TargetMachine &TM):
ELFTargetAsmInfo(TM) {
CommentString = "//";
Data8bitsDirective = "\tdata1\t"; // FIXME: check that we are
Data16bitsDirective = "\tdata2.ua\t"; // disabling auto-alignment
Data32bitsDirective = "\tdata4.ua\t"; // properly
Data64bitsDirective = "\tdata8.ua\t";
ZeroDirective = "\t.skip\t";
AsciiDirective = "\tstring\t";
GlobalVarAddrPrefix="";
GlobalVarAddrSuffix="";
FunctionAddrPrefix="@fptr(";
FunctionAddrSuffix=")";
// FIXME: would be nice to have rodata (no 'w') when appropriate?
ConstantPoolSection = "\n\t.section .data, \"aw\", \"progbits\"\n";
}
// FIXME: Support small data/bss/rodata sections someday.