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https://github.com/c64scene-ar/llvm-6502.git
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8a8d479214
change, now you need a TargetOptions object to create a TargetMachine. Clang patch to follow. One small functionality change in PTX. PTX had commented out the machine verifier parts in their copy of printAndVerify. That now calls the version in LLVMTargetMachine. Users of PTX who need verification disabled should rely on not passing the command-line flag to enable it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
124 lines
4.1 KiB
C++
124 lines
4.1 KiB
C++
//===-- MipsTargetMachine.h - Define TargetMachine for Mips -00--*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the Mips specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MIPSTARGETMACHINE_H
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#define MIPSTARGETMACHINE_H
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#include "MipsSubtarget.h"
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#include "MipsInstrInfo.h"
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#include "MipsISelLowering.h"
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#include "MipsFrameLowering.h"
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#include "MipsSelectionDAGInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "MipsJITInfo.h"
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namespace llvm {
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class formatted_raw_ostream;
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class MipsTargetMachine : public LLVMTargetMachine {
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MipsSubtarget Subtarget;
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const TargetData DataLayout; // Calculates type size & alignment
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MipsInstrInfo InstrInfo;
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MipsFrameLowering FrameLowering;
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MipsTargetLowering TLInfo;
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MipsSelectionDAGInfo TSInfo;
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MipsJITInfo JITInfo;
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public:
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MipsTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL,
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bool isLittle);
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virtual const MipsInstrInfo *getInstrInfo() const
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{ return &InstrInfo; }
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virtual const TargetFrameLowering *getFrameLowering() const
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{ return &FrameLowering; }
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virtual const MipsSubtarget *getSubtargetImpl() const
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{ return &Subtarget; }
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virtual const TargetData *getTargetData() const
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{ return &DataLayout;}
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virtual MipsJITInfo *getJITInfo()
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{ return &JITInfo; }
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virtual const MipsRegisterInfo *getRegisterInfo() const {
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return &InstrInfo.getRegisterInfo();
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}
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virtual const MipsTargetLowering *getTargetLowering() const {
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return &TLInfo;
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}
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virtual const MipsSelectionDAGInfo* getSelectionDAGInfo() const {
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return &TSInfo;
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}
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// Pass Pipeline Configuration
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virtual bool addInstSelector(PassManagerBase &PM);
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virtual bool addPreEmitPass(PassManagerBase &PM);
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virtual bool addPreRegAlloc(PassManagerBase &PM);
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virtual bool addPostRegAlloc(PassManagerBase &);
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virtual bool addCodeEmitter(PassManagerBase &PM,
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JITCodeEmitter &JCE);
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};
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/// MipsebTargetMachine - Mips32 big endian target machine.
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///
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class MipsebTargetMachine : public MipsTargetMachine {
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public:
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MipsebTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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/// MipselTargetMachine - Mips32 little endian target machine.
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///
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class MipselTargetMachine : public MipsTargetMachine {
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public:
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MipselTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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/// Mips64ebTargetMachine - Mips64 big endian target machine.
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///
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class Mips64ebTargetMachine : public MipsTargetMachine {
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public:
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Mips64ebTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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/// Mips64elTargetMachine - Mips64 little endian target machine.
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///
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class Mips64elTargetMachine : public MipsTargetMachine {
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public:
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Mips64elTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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} // End llvm namespace
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#endif
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