mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-30 02:32:08 +00:00
e50487796d
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159353 91177308-0d34-0410-b5e6-96231b3b80d8
168 lines
2.8 KiB
LLVM
168 lines
2.8 KiB
LLVM
; RUN: opt -correlated-propagation -S < %s | FileCheck %s
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declare i32 @foo()
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define i32 @test1(i32 %a) nounwind {
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%a.off = add i32 %a, -8
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%cmp = icmp ult i32 %a.off, 8
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp eq i32 %a, 7
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br i1 %dead, label %end, label %else
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else:
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ret i32 1
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end:
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ret i32 2
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; CHECK: @test1
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; CHECK: then:
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; CHECK-NEXT: br i1 false, label %end, label %else
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}
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define i32 @test2(i32 %a) nounwind {
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%a.off = add i32 %a, -8
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%cmp = icmp ult i32 %a.off, 8
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp ugt i32 %a, 15
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br i1 %dead, label %end, label %else
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else:
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ret i32 1
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end:
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ret i32 2
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; CHECK: @test2
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; CHECK: then:
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; CHECK-NEXT: br i1 false, label %end, label %else
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}
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; CHECK: @test3
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define i32 @test3(i32 %c) nounwind {
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%cmp = icmp slt i32 %c, 2
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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ret i32 1
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if.end:
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%cmp1 = icmp slt i32 %c, 3
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br i1 %cmp1, label %if.then2, label %if.end8
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; CHECK: if.then2
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if.then2:
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%cmp2 = icmp eq i32 %c, 2
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; CHECK: br i1 true
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br i1 %cmp2, label %if.then4, label %if.end6
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; CHECK: if.end6
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if.end6:
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ret i32 2
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if.then4:
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ret i32 3
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if.end8:
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ret i32 4
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}
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; CHECK: @test4
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define i32 @test4(i32 %c) nounwind {
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switch i32 %c, label %sw.default [
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i32 1, label %sw.bb
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i32 2, label %sw.bb
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i32 4, label %sw.bb
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]
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; CHECK: sw.bb
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sw.bb:
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%cmp = icmp sge i32 %c, 1
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; CHECK: br i1 true
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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br label %return
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if.end:
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br label %return
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sw.default:
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br label %return
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return:
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%retval.0 = phi i32 [ 42, %sw.default ], [ 4, %if.then ], [ 9, %if.end ]
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ret i32 %retval.0
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}
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; CHECK: @test5
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define i1 @test5(i32 %c) nounwind {
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%cmp = icmp slt i32 %c, 5
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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%cmp1 = icmp eq i32 %c, 4
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br i1 %cmp1, label %if.end, label %if.end8
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if.end:
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ret i1 true
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if.end8:
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%cmp2 = icmp eq i32 %c, 3
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%cmp3 = icmp eq i32 %c, 4
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%cmp4 = icmp eq i32 %c, 6
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; CHECK: %or = or i1 false, false
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%or = or i1 %cmp3, %cmp4
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; CHECK: ret i1 %cmp2
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ret i1 %cmp2
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}
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; CHECK: @test6
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define i1 @test6(i32 %c) nounwind {
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%cmp = icmp ule i32 %c, 7
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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; CHECK: icmp eq i32 %c, 6
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; CHECK: br i1
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switch i32 %c, label %if.end [
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i32 6, label %sw.bb
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i32 8, label %sw.bb
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]
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if.end:
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ret i1 true
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sw.bb:
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%cmp2 = icmp eq i32 %c, 6
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; CHECK: ret i1 true
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ret i1 %cmp2
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}
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; CHECK: @test7
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define i1 @test7(i32 %c) nounwind {
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entry:
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switch i32 %c, label %sw.default [
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i32 6, label %sw.bb
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i32 7, label %sw.bb
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]
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sw.bb:
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ret i1 true
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sw.default:
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%cmp5 = icmp eq i32 %c, 5
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%cmp6 = icmp eq i32 %c, 6
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%cmp7 = icmp eq i32 %c, 7
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%cmp8 = icmp eq i32 %c, 8
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; CHECK: %or = or i1 %cmp5, false
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%or = or i1 %cmp5, %cmp6
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; CHECK: %or2 = or i1 false, %cmp8
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%or2 = or i1 %cmp7, %cmp8
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ret i1 false
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}
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