llvm-6502/test/CodeGen/AArch64/arm64-2012-01-11-ComparisonDAGCrash.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

41 lines
1011 B
LLVM

; RUN: llc < %s -march=arm64
; The target lowering for integer comparisons was replacing some DAG nodes
; during operation legalization, which resulted in dangling pointers,
; cycles in DAGs, and eventually crashes. This is the testcase for
; one of those crashes. (rdar://10653656)
define void @test(i1 zeroext %IsArrow) nounwind ssp align 2 {
entry:
br i1 undef, label %return, label %lor.lhs.false
lor.lhs.false:
br i1 undef, label %return, label %if.end
if.end:
%tmp.i = load i64, i64* undef, align 8
%and.i.i.i = and i64 %tmp.i, -16
br i1 %IsArrow, label %if.else_crit_edge, label %if.end32
if.else_crit_edge:
br i1 undef, label %if.end32, label %return
if.end32:
%0 = icmp ult i32 undef, 3
%1 = zext i64 %tmp.i to i320
%.pn.v = select i1 %0, i320 128, i320 64
%.pn = shl i320 %1, %.pn.v
%ins346392 = or i320 %.pn, 0
store i320 %ins346392, i320* undef, align 8
br i1 undef, label %sw.bb.i.i, label %exit
sw.bb.i.i:
unreachable
exit:
unreachable
return:
ret void
}