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https://github.com/c64scene-ar/llvm-6502.git
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184f8f7c10
TableGen had been nicely generating code to print a number of instructions using shorter aliases (and PowerPC has plenty of short mnemonics), but we were not calling it. For some of the aliases we support in the parser, TableGen can't infer the "inverse" alias relationship, so there is still more to do. Thus, after some hours of updating test cases... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235616 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
968 B
LLVM
27 lines
968 B
LLVM
; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
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; RUN: grep cntlz
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define i32 @foo() nounwind {
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entry:
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%retval = alloca i32, align 4 ; <i32*> [#uses=2]
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%temp = alloca i32, align 4 ; <i32*> [#uses=2]
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%ctz_x = alloca i32, align 4 ; <i32*> [#uses=3]
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%ctz_c = alloca i32, align 4 ; <i32*> [#uses=2]
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store i32 61440, i32* %ctz_x
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%tmp = load i32, i32* %ctz_x ; <i32> [#uses=1]
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%tmp1 = sub i32 0, %tmp ; <i32> [#uses=1]
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%tmp2 = load i32, i32* %ctz_x ; <i32> [#uses=1]
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%tmp3 = and i32 %tmp1, %tmp2 ; <i32> [#uses=1]
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%tmp4 = call i32 asm "$(cntlz$|cntlzw$) $0,$1", "=r,r,~{dirflag},~{fpsr},~{flags}"( i32 %tmp3 ) ; <i32> [#uses=1]
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store i32 %tmp4, i32* %ctz_c
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%tmp5 = load i32, i32* %ctz_c ; <i32> [#uses=1]
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store i32 %tmp5, i32* %temp
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%tmp6 = load i32, i32* %temp ; <i32> [#uses=1]
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store i32 %tmp6, i32* %retval
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br label %return
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return: ; preds = %entry
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%retval2 = load i32, i32* %retval ; <i32> [#uses=1]
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ret i32 %retval2
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}
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