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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
911 B
LLVM
26 lines
911 B
LLVM
; RUN: llc < %s -march=ppc64
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define fastcc i8* @page_rec_get_next(i8* %rec) nounwind {
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entry:
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%tmp2627 = ptrtoint i8* %rec to i64 ; <i64> [#uses=2]
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%tmp28 = and i64 %tmp2627, -16384 ; <i64> [#uses=2]
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%tmp2829 = inttoptr i64 %tmp28 to i8* ; <i8*> [#uses=1]
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%tmp37 = getelementptr i8, i8* %tmp2829, i64 42 ; <i8*> [#uses=1]
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%tmp40 = load i8, i8* %tmp37, align 1 ; <i8> [#uses=1]
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%tmp4041 = zext i8 %tmp40 to i64 ; <i64> [#uses=1]
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%tmp42 = shl i64 %tmp4041, 8 ; <i64> [#uses=1]
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%tmp47 = add i64 %tmp42, 0 ; <i64> [#uses=1]
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%tmp52 = and i64 %tmp47, 32768 ; <i64> [#uses=1]
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%tmp72 = icmp eq i64 %tmp52, 0 ; <i1> [#uses=1]
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br i1 %tmp72, label %bb91, label %bb
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bb: ; preds = %entry
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ret i8* null
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bb91: ; preds = %entry
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br i1 false, label %bb100, label %bb185
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bb100: ; preds = %bb91
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%tmp106 = sub i64 %tmp2627, %tmp28 ; <i64> [#uses=0]
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ret i8* null
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bb185: ; preds = %bb91
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ret i8* null
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}
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