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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
1.1 KiB
LLVM
34 lines
1.1 KiB
LLVM
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s
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; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s
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; SI-LABEL: {{^}}vector_imin:
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; SI: v_min_i32_e32
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define void @vector_imin(i32 %p0, i32 %p1, i32 addrspace(1)* %in) #0 {
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main_body:
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%load = load i32, i32 addrspace(1)* %in, align 4
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%min = call i32 @llvm.AMDGPU.imin(i32 %p0, i32 %load)
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%bc = bitcast i32 %min to float
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
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ret void
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}
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; SI-LABEL: {{^}}scalar_imin:
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; SI: s_min_i32
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define void @scalar_imin(i32 %p0, i32 %p1) #0 {
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entry:
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%min = call i32 @llvm.AMDGPU.imin(i32 %p0, i32 %p1)
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%bc = bitcast i32 %min to float
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
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ret void
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}
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; Function Attrs: readnone
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declare i32 @llvm.AMDGPU.imin(i32, i32) #1
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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!0 = !{!"const", null, i32 1}
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