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8d7cc6b0ff
register class tGPRRegClass if the target is thumb1. This commit fixes a crash that occurs during register allocation which was triggered when a virtual register defined by an inline-asm instruction had to be spilled. rdar://problem/18740489 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221178 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
560 B
LLVM
20 lines
560 B
LLVM
; RUN: llc -mtriple=thumb-eabi -no-integrated-as %s -o - | FileCheck %s
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define i32 @t1(i32 %x, i32 %y) nounwind {
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entry:
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; CHECK: mov r0, r12
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%0 = tail call i32 asm "mov $0, $1", "=l,h"(i32 %y) nounwind
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ret i32 %0
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}
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; CHECK-LABEL: constraint_r:
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; CHECK: foo2 r{{[0-7]+}}, r{{[0-7]+}}
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define i32 @constraint_r() {
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entry:
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%0 = tail call i32 asm sideeffect "movs $0, #1", "=r"()
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tail call void asm sideeffect "foo1", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7}"()
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%1 = tail call i32 asm sideeffect "foo2 $0, $1", "=r,r"(i32 %0)
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ret i32 %1
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}
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