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1330ee3189
Another part of the ARM64 backend (so tests will be following soon). This is currently used by the linker to relax adrp/ldr pairs into nops where possible, though could well be more broadly applicable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205084 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
1.1 KiB
C++
31 lines
1.1 KiB
C++
//===-- llvm/MC/MCLinkerOptimizationHint.cpp ----- LOH handling -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/MCLinkerOptimizationHint.h"
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#include "llvm/MC/MCAsmLayout.h"
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#include "llvm/Support/LEB128.h"
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#include "llvm/MC/MCStreamer.h"
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using namespace llvm;
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namespace llvm {
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template<>
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void MCLOHDirective::Emit_impl(raw_ostream &OutStream,
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const MachObjectWriter &ObjWriter,
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const MCAsmLayout &Layout) const {
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const MCAssembler &Asm = Layout.getAssembler();
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encodeULEB128(Kind, OutStream);
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encodeULEB128(Args.size(), OutStream);
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for (LOHArgs::const_iterator It = Args.begin(), EndIt = Args.end();
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It != EndIt; ++It)
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encodeULEB128(ObjWriter.getSymbolAddress(&Asm.getSymbolData(**It), Layout),
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OutStream);
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}
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} // end namespace llvm
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