mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
63 lines
1.8 KiB
C++
63 lines
1.8 KiB
C++
//===-- ARM64MCTargetDesc.h - ARM64 Target Descriptions ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides ARM64 specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef ARM64MCTARGETDESC_H
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#define ARM64MCTARGETDESC_H
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#include "llvm/Support/DataTypes.h"
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#include <string>
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namespace llvm {
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class MCAsmBackend;
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class MCCodeEmitter;
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class MCContext;
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class MCInstrInfo;
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class MCRegisterInfo;
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class MCObjectWriter;
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class MCSubtargetInfo;
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class StringRef;
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class Target;
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class raw_ostream;
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extern Target TheARM64Target;
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MCCodeEmitter *createARM64MCCodeEmitter(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI,
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MCContext &Ctx);
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MCAsmBackend *createARM64AsmBackend(const Target &T, const MCRegisterInfo &MRI,
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StringRef TT, StringRef CPU);
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MCObjectWriter *createARM64ELFObjectWriter(raw_ostream &OS, uint8_t OSABI);
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MCObjectWriter *createARM64MachObjectWriter(raw_ostream &OS, uint32_t CPUType,
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uint32_t CPUSubtype);
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} // End llvm namespace
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// Defines symbolic names for ARM64 registers. This defines a mapping from
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// register name to register number.
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//
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#define GET_REGINFO_ENUM
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#include "ARM64GenRegisterInfo.inc"
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// Defines symbolic names for the ARM64 instructions.
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//
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#define GET_INSTRINFO_ENUM
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#include "ARM64GenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "ARM64GenSubtargetInfo.inc"
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#endif
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